Commit 600a1dfa authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'randconfig-fixes' into next/fixes-non-critical 



This is the first batch of a much longer series of bug fixes
found during randconfig testing. This part are all the simple
patches that are applicable for the arm-soc tree, while most
other fixes will likely go through other maintainers.

* randconfig-fixes: (50 commits)
  ARM: tegra: make debug_ll code build for ARMv6
  ARM: sunxi: fix build for THUMB2_KERNEL
  ARM: exynos: add missing include of linux/module.h
  ARM: exynos: fix l2x0 saved regs handling
  ARM: samsung: select CRC32 for SAMSUNG_PM_CHECK
  ARM: samsung: select ATAGS where necessary
  ARM: samsung: fix SAMSUNG_PM_DEBUG Kconfig logic
  ARM: samsung: allow serial driver to be disabled
  ARM: s5pv210: enable IDE support in MACH_TORBRECK
  ARM: s5p64x0: fix building with only one soc type
  ARM: s3c64xx: select power domains only when used
  ARM: s3c64xx: MACH_SMDK6400 needs HSMMC1
  ARM: s3c24xx: osiris dvs needs tps65010
  ARM: s3c24xx: fix gta02 build error
  ARM: s3c24xx: MINI2440 needs I2C for EEPROM_AT24
  ARM: integrator: only select pl01x if TTY is enabled
  ARM: realview: fix sparsemem build
  ARM: footbridge: make screen_info setup conditional
  ARM: footbridge: fix build with PCI disabled
  ARM: footbridge: don't build floppy code for addin mode
  ...

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents b44ce3b0 9f3ba456

arch/arm/Kconfig

+8 −1
Original line number Diff line number Diff line
@@ -420,6 +420,7 @@ config ARCH_EFM32 
	bool "Energy Micro efm32"

	depends on !MMU

	select ARCH_REQUIRE_GPIOLIB

	select AUTO_ZRELADDR

	select ARM_NVIC

	# CLKSRC_MMIO is wrong here, but needed until a proper fix is merged,

	# i.e. CLKSRC_EFM32 selecting CLKSRC_MMIO
@@ -697,6 +698,7 @@ config ARCH_RPC 
	select ARCH_MAY_HAVE_PC_FDC

	select ARCH_SPARSEMEM_ENABLE

	select ARCH_USES_GETTIMEOFFSET

	select CPU_SA110

	select FIQ

	select HAVE_IDE

	select HAVE_PATA_PLATFORM
@@ -731,6 +733,7 @@ config ARCH_S3C24XX 
	bool "Samsung S3C24XX SoCs"

	select ARCH_HAS_CPUFREQ

	select ARCH_REQUIRE_GPIOLIB

	select ATAGS

	select CLKDEV_LOOKUP

	select CLKSRC_SAMSUNG_PWM

	select GENERIC_CLOCKEVENTS
@@ -753,6 +756,7 @@ config ARCH_S3C64XX 
	select ARCH_REQUIRE_GPIOLIB

	select ARM_AMBA

	select ARM_VIC

	select ATAGS

	select CLKDEV_LOOKUP

	select CLKSRC_SAMSUNG_PWM

	select COMMON_CLK
@@ -764,7 +768,7 @@ config ARCH_S3C64XX 
	select HAVE_TCM

	select NO_IOPORT

	select PLAT_SAMSUNG

	select PM_GENERIC_DOMAINS

	select PM_GENERIC_DOMAINS if PM

	select S3C_DEV_NAND

	select S3C_GPIO_TRACK

	select SAMSUNG_ATAGS
@@ -776,6 +780,7 @@ config ARCH_S3C64XX 


config ARCH_S5P64X0

	bool "Samsung S5P6440 S5P6450"

	select ATAGS

	select CLKDEV_LOOKUP

	select CLKSRC_SAMSUNG_PWM

	select CPU_V6
@@ -794,6 +799,7 @@ config ARCH_S5P64X0 
config ARCH_S5PC100

	bool "Samsung S5PC100"

	select ARCH_REQUIRE_GPIOLIB

	select ATAGS

	select CLKDEV_LOOKUP

	select CLKSRC_SAMSUNG_PWM

	select CPU_V7
@@ -813,6 +819,7 @@ config ARCH_S5PV210 
	select ARCH_HAS_CPUFREQ

	select ARCH_HAS_HOLES_MEMORYMODEL

	select ARCH_SPARSEMEM_ENABLE

	select ATAGS

	select CLKDEV_LOOKUP

	select CLKSRC_SAMSUNG_PWM

	select CPU_V7

arch/arm/configs/davinci_all_defconfig

+2 −0
Original line number Diff line number Diff line
@@ -198,3 +198,5 @@ CONFIG_DEBUG_ERRORS=y 
# CONFIG_CRYPTO_ANSI_CPRNG is not set

# CONFIG_CRYPTO_HW is not set

CONFIG_CRC_T10DIF=m

CONFIG_GPIO_PCA953X=y

CONFIG_KEYBOARD_GPIO_POLLED=y

arch/arm/include/asm/smp.h

+1 −0
Original line number Diff line number Diff line
@@ -74,6 +74,7 @@ struct secondary_data { 
};

extern struct secondary_data secondary_data;

extern volatile int pen_release;

extern void secondary_startup(void);



extern int __cpu_disable(void);

arch/arm/include/debug/tegra.S

+8 −10
Original line number Diff line number Diff line
@@ -53,8 +53,7 @@ 


#define checkuart(rp, rv, lhu, bit, uart) \

		/* Load address of CLK_RST register */ \

		movw	rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \

		movt	rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \

		ldr	rp, =TEGRA_CLK_RST_DEVICES_##lhu ; \

		/* Load value from CLK_RST register */ \

		ldr	rp, [rp, #0] ; \

		/* Test UART's reset bit */ \
@@ -62,8 +61,7 @@ 
		/* If set, can't use UART; jump to save no UART */ \

		bne	90f ; \

		/* Load address of CLK_OUT_ENB register */ \

		movw	rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \

		movt	rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \

		ldr	rp, =TEGRA_CLK_OUT_ENB_##lhu ; \

		/* Load value from CLK_OUT_ENB register */ \

		ldr	rp, [rp, #0] ; \

		/* Test UART's clock enable bit */ \
@@ -71,8 +69,7 @@ 
		/* If clear, can't use UART; jump to save no UART */ \

		beq	90f ; \

		/* Passed all tests, load address of UART registers */ \

		movw	rp, #TEGRA_UART##uart##_BASE & 0xffff ; \

		movt	rp, #TEGRA_UART##uart##_BASE >> 16 ; \

		ldr	rp, =TEGRA_UART##uart##_BASE ; \

		/* Jump to save UART address */ \

		b 91f
@@ -90,15 +87,16 @@ 


#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA

		/* Check ODMDATA */

10:		movw	\rp, #TEGRA_PMC_SCRATCH20 & 0xffff

		movt	\rp, #TEGRA_PMC_SCRATCH20 >> 16

10:		ldr	\rp, =TEGRA_PMC_SCRATCH20

		ldr	\rp, [\rp, #0]		@ Load PMC_SCRATCH20

		ubfx	\rv, \rp, #18, #2	@ 19:18 are console type

		lsr	\rv, \rp, #18		@ 19:18 are console type

		and	\rv, \rv, #3

		cmp	\rv, #2			@ 2 and 3 mean DCC, UART

		beq	11f			@ some boards swap the meaning

		cmp	\rv, #3			@ so accept either

		bne	90f

11:		ubfx	\rv, \rp, #15, #3	@ 17:15 are UART ID

11:		lsr	\rv, \rp, #15		@ 17:15 are UART ID

		and	\rv, #7	

		cmp	\rv, #0			@ UART 0?

		beq	20f

		cmp	\rv, #1			@ UART 1?

arch/arm/mach-at91/Kconfig

+19 −4
Original line number Diff line number Diff line
@@ -57,6 +57,7 @@ config SOC_SAMA5 
	select GENERIC_CLOCKEVENTS

	select MULTI_IRQ_HANDLER

	select SPARSE_IRQ

	select USE_OF



menu "Atmel AT91 System-on-Chip"
@@ -64,11 +65,22 @@ choice 


	prompt "Core type"



config ARCH_AT91X40

	bool "ARM7 AT91X40"

	depends on !MMU

	select CPU_ARM7TDMI

	select ARCH_USES_GETTIMEOFFSET

	select MULTI_IRQ_HANDLER

	select SPARSE_IRQ



	help

	  Select this if you are using one of Atmel's AT91X40 SoC.



config SOC_SAM_V4_V5

	bool "ARM7/ARM9"

	bool "ARM9 AT91SAM9/AT91RM9200"

	help

	  Select this if you are using one of Atmel's AT91SAM9, AT91RM9200

	  or AT91X40 SoC.

	  Select this if you are using one of Atmel's AT91SAM9 or

	  AT91RM9200 SoC.



config SOC_SAM_V7

	bool "Cortex A5"
@@ -179,9 +191,12 @@ config SOC_AT91SAM9N12 
	  Select this if you are using Atmel's AT91SAM9N12 SoC.



# ----------------------------------------------------------

endif # SOC_SAM_V4_V5





if SOC_SAM_V4_V5 || ARCH_AT91X40

source arch/arm/mach-at91/Kconfig.non_dt

endif # SOC_SAM_V4_V5

endif



comment "Generic Board Type"

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