Commit 5ffec6f9 authored by Sean Christopherson's avatar Sean Christopherson Committed by Paolo Bonzini
Browse files

KVM: x86: Handle INVPCID CPUID adjustment in VMX code 



Move the INVPCID CPUID adjustments into VMX to eliminate an instance of
the undesirable "unsigned f_* = *_supported ? F(*) : 0" pattern in the
common CPUID handling code.  Drop ->invpcid_supported(), CPUID
adjustment was the only user.

No functional change intended.

Reviewed-by: default avatarVitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 6c7ea4b5

arch/x86/include/asm/kvm_host.h

+0 −1
Original line number Diff line number Diff line
@@ -1157,7 +1157,6 @@ struct kvm_x86_ops { 
	u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);

	int (*get_lpage_level)(void);

	bool (*rdtscp_supported)(void);

	bool (*invpcid_supported)(void);



	void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);

arch/x86/kvm/cpuid.c

+1 −2
Original line number Diff line number Diff line
@@ -331,7 +331,6 @@ static int __do_cpuid_func_emulated(struct kvm_cpuid_array *array, u32 func) 


static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry)

{

	unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;

	unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;

	unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;

	unsigned f_la57;
@@ -340,7 +339,7 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry) 
	/* cpuid 7.0.ebx */

	const u32 kvm_cpuid_7_0_ebx_x86_features =

		F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |

		F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | 0 /*MPX*/ | F(RDSEED) |

		F(BMI2) | F(ERMS) | 0 /*INVPCID*/ | F(RTM) | 0 /*MPX*/ | F(RDSEED) |

		F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |

		F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |

		F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;

arch/x86/kvm/svm.c

+0 −6
Original line number Diff line number Diff line
@@ -6073,11 +6073,6 @@ static bool svm_rdtscp_supported(void) 
	return boot_cpu_has(X86_FEATURE_RDTSCP);

}



static bool svm_invpcid_supported(void)

{

	return false;

}



static bool svm_xsaves_supported(void)

{

	return boot_cpu_has(X86_FEATURE_XSAVES);
@@ -7460,7 +7455,6 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = { 
	.cpuid_update = svm_cpuid_update,



	.rdtscp_supported = svm_rdtscp_supported,

	.invpcid_supported = svm_invpcid_supported,

	.xsaves_supported = svm_xsaves_supported,

	.umip_emulated = svm_umip_emulated,

	.pt_supported = svm_pt_supported,

arch/x86/kvm/vmx/vmx.c

+3 −7
Original line number Diff line number Diff line
@@ -1692,11 +1692,6 @@ static bool vmx_rdtscp_supported(void) 
	return cpu_has_vmx_rdtscp();

}



static bool vmx_invpcid_supported(void)

{

	return cpu_has_vmx_invpcid();

}



/*

 * Swap MSR entry in host/guest MSR entry array.

 */
@@ -4093,7 +4088,7 @@ static void vmx_compute_secondary_exec_control(struct vcpu_vmx *vmx) 
		}

	}



	if (vmx_invpcid_supported()) {

	if (cpu_has_vmx_invpcid()) {

		/* Exposing INVPCID only when PCID is exposed */

		bool invpcid_enabled =

			guest_cpuid_has(vcpu, X86_FEATURE_INVPCID) &&
@@ -7138,6 +7133,8 @@ static void vmx_set_supported_cpuid(struct kvm_cpuid_entry2 *entry) 
	case 0x7:

		if (boot_cpu_has(X86_FEATURE_MPX) && kvm_mpx_supported())

			cpuid_entry_set(entry, X86_FEATURE_MPX);

		if (boot_cpu_has(X86_FEATURE_INVPCID) && cpu_has_vmx_invpcid())

			cpuid_entry_set(entry, X86_FEATURE_INVPCID);

		break;

	default:

		break;
@@ -7924,7 +7921,6 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = { 
	.cpuid_update = vmx_cpuid_update,



	.rdtscp_supported = vmx_rdtscp_supported,

	.invpcid_supported = vmx_invpcid_supported,



	.set_supported_cpuid = vmx_set_supported_cpuid,

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