Commit 5fe6b98a authored by Bhawanpreet Lakha's avatar Bhawanpreet Lakha Committed by Alex Deucher
Browse files

drm/amd/display: Update dmub code 



There is a delta in the dmub code
- add boot options
- add boot status
- remove unused auto_load_is_done func pointer

Signed-off-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b3fcde18

drivers/gpu/drm/amd/display/dmub/dmub_srv.h

+19 −1
Original line number Diff line number Diff line
@@ -265,8 +265,12 @@ struct dmub_srv_hw_funcs { 
	bool (*is_hw_init)(struct dmub_srv *dmub);



	bool (*is_phy_init)(struct dmub_srv *dmub);

	void (*enable_dmub_boot_options)(struct dmub_srv *dmub);



	void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);



	union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);



	bool (*is_auto_load_done)(struct dmub_srv *dmub);



	void (*set_gpint)(struct dmub_srv *dmub,

			  union dmub_gpint_data_register reg);
@@ -309,6 +313,7 @@ struct dmub_srv_hw_params { 
	uint64_t fb_offset;

	uint32_t psp_version;

	bool load_inst_const;

	bool skip_panel_power_sequence;

};



/**
@@ -590,6 +595,19 @@ enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub, 
 */

void dmub_flush_buffer_mem(const struct dmub_fb *fb);



/**

 * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.

 *

 * @dmub: the dmub service

 * @status: out pointer for firmware status

 *

 * Return:

 *   DMUB_STATUS_OK - success

 *   DMUB_STATUS_INVALID - unspecified error, unsupported

 */

enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,

					     union dmub_fw_boot_status *status);



#if defined(__cplusplus)

}

#endif

drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h

+2 −1
Original line number Diff line number Diff line
@@ -191,7 +191,8 @@ union dmub_fw_boot_options { 
		uint32_t optimized_init : 1;

		uint32_t skip_phy_access : 1;

		uint32_t disable_clk_gate: 1;

		uint32_t reserved : 27;

		uint32_t skip_phy_init_panel_sequence: 1;

		uint32_t reserved : 26;

	} bits;

	uint32_t all;

};

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c

+23 −0
Original line number Diff line number Diff line
@@ -312,3 +312,26 @@ uint32_t dmub_dcn20_get_gpint_response(struct dmub_srv *dmub) 
{

	return REG_READ(DMCUB_SCRATCH7);

}



union dmub_fw_boot_status dmub_dcn20_get_fw_boot_status(struct dmub_srv *dmub)

{

	union dmub_fw_boot_status status;



	status.all = REG_READ(DMCUB_SCRATCH0);

	return status;

}



void dmub_dcn20_enable_dmub_boot_options(struct dmub_srv *dmub)

{

	union dmub_fw_boot_options boot_options = {0};



	REG_WRITE(DMCUB_SCRATCH14, boot_options.all);

}



void dmub_dcn20_skip_dmub_panel_power_sequence(struct dmub_srv *dmub, bool skip)

{

	union dmub_fw_boot_options boot_options;

	boot_options.all = REG_READ(DMCUB_SCRATCH14);

	boot_options.bits.skip_phy_init_panel_sequence = skip;

	REG_WRITE(DMCUB_SCRATCH14, boot_options.all);

}

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

+6 −0
Original line number Diff line number Diff line
@@ -192,4 +192,10 @@ bool dmub_dcn20_is_gpint_acked(struct dmub_srv *dmub, 


uint32_t dmub_dcn20_get_gpint_response(struct dmub_srv *dmub);



void dmub_dcn20_enable_dmub_boot_options(struct dmub_srv *dmub);



void dmub_dcn20_skip_dmub_panel_power_sequence(struct dmub_srv *dmub, bool skip);



union dmub_fw_boot_status dmub_dcn20_get_fw_boot_status(struct dmub_srv *dmub);



#endif /* _DMUB_DCN20_H_ */

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c

+0 −5
Original line number Diff line number Diff line
@@ -53,11 +53,6 @@ const struct dmub_srv_common_regs dmub_srv_dcn21_regs = { 


/* Shared functions. */



bool dmub_dcn21_is_auto_load_done(struct dmub_srv *dmub)

{

	return (REG_READ(DMCUB_SCRATCH0) == 3);

}



bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub)

{

	return REG_READ(DMCUB_SCRATCH10) == 0;

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