Commit 5fb7c665 authored by Le Ma's avatar Le Ma Committed by Alex Deucher
Browse files

drm/amdgpu: correct ip for mmHDP_READ_CACHE_INVALIDATE register access



Use the proper IP index for HDP registers.

Signed-off-by: default avatarLe Ma <le.ma@amd.com>
Reviewed-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7d0670f4
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+1 −1
Original line number Diff line number Diff line
@@ -703,7 +703,7 @@ static void soc15_invalidate_hdp(struct amdgpu_device *adev,
				 struct amdgpu_ring *ring)
{
	if (!ring || !ring->funcs->emit_wreg)
		WREG32_SOC15_NO_KIQ(NBIO, 0, mmHDP_READ_CACHE_INVALIDATE, 1);
		WREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE, 1);
	else
		amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET(
			HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1);