Commit 5fa87d34 authored by Mark Brown's avatar Mark Brown
Browse files

ASoC: wm8400: Use snd_soc_write() and snd_soc_read() 



Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 7e811ae7

sound/soc/codecs/wm8400.c

+66 −66
Original line number Diff line number Diff line
@@ -138,8 +138,8 @@ static int wm8400_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 
                return ret;



        /* now hit the volume update bits (always bit 8) */

        val = wm8400_read(codec, reg);

        return wm8400_write(codec, reg, val | 0x0100);

        val = snd_soc_read(codec, reg);

        return snd_soc_write(codec, reg, val | 0x0100);

}



#define WM8400_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert, tlv_array) \
@@ -362,8 +362,8 @@ static int inmixer_event (struct snd_soc_dapm_widget *w, 
{

	u16 reg, fakepower;



	reg = wm8400_read(w->codec, WM8400_POWER_MANAGEMENT_2);

	fakepower = wm8400_read(w->codec, WM8400_INTDRIVBITS);

	reg = snd_soc_read(w->codec, WM8400_POWER_MANAGEMENT_2);

	fakepower = snd_soc_read(w->codec, WM8400_INTDRIVBITS);



	if (fakepower & ((1 << WM8400_INMIXL_PWR) |

		(1 << WM8400_AINLMUX_PWR))) {
@@ -378,7 +378,7 @@ static int inmixer_event (struct snd_soc_dapm_widget *w, 
	} else {

		reg &= ~WM8400_AINR_ENA;

	}

	wm8400_write(w->codec, WM8400_POWER_MANAGEMENT_2, reg);

	snd_soc_write(w->codec, WM8400_POWER_MANAGEMENT_2, reg);



	return 0;

}
@@ -394,7 +394,7 @@ static int outmixer_event (struct snd_soc_dapm_widget *w, 


	switch (reg_shift) {

	case WM8400_SPEAKER_MIXER | (WM8400_LDSPK << 8) :

		reg = wm8400_read(w->codec, WM8400_OUTPUT_MIXER1);

		reg = snd_soc_read(w->codec, WM8400_OUTPUT_MIXER1);

		if (reg & WM8400_LDLO) {

			printk(KERN_WARNING

			"Cannot set as Output Mixer 1 LDLO Set\n");
@@ -402,7 +402,7 @@ static int outmixer_event (struct snd_soc_dapm_widget *w, 
		}

		break;

	case WM8400_SPEAKER_MIXER | (WM8400_RDSPK << 8):

		reg = wm8400_read(w->codec, WM8400_OUTPUT_MIXER2);

		reg = snd_soc_read(w->codec, WM8400_OUTPUT_MIXER2);

		if (reg & WM8400_RDRO) {

			printk(KERN_WARNING

			"Cannot set as Output Mixer 2 RDRO Set\n");
@@ -410,7 +410,7 @@ static int outmixer_event (struct snd_soc_dapm_widget *w, 
		}

		break;

	case WM8400_OUTPUT_MIXER1 | (WM8400_LDLO << 8):

		reg = wm8400_read(w->codec, WM8400_SPEAKER_MIXER);

		reg = snd_soc_read(w->codec, WM8400_SPEAKER_MIXER);

		if (reg & WM8400_LDSPK) {

			printk(KERN_WARNING

			"Cannot set as Speaker Mixer LDSPK Set\n");
@@ -418,7 +418,7 @@ static int outmixer_event (struct snd_soc_dapm_widget *w, 
		}

		break;

	case WM8400_OUTPUT_MIXER2 | (WM8400_RDRO << 8):

		reg = wm8400_read(w->codec, WM8400_SPEAKER_MIXER);

		reg = snd_soc_read(w->codec, WM8400_SPEAKER_MIXER);

		if (reg & WM8400_RDSPK) {

			printk(KERN_WARNING

			"Cannot set as Speaker Mixer RDSPK Set\n");
@@ -1021,13 +1021,13 @@ static int wm8400_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 
	wm8400->fll_in = freq_in;



	/* We *must* disable the FLL before any changes */

	reg = wm8400_read(codec, WM8400_POWER_MANAGEMENT_2);

	reg = snd_soc_read(codec, WM8400_POWER_MANAGEMENT_2);

	reg &= ~WM8400_FLL_ENA;

	wm8400_write(codec, WM8400_POWER_MANAGEMENT_2, reg);

	snd_soc_write(codec, WM8400_POWER_MANAGEMENT_2, reg);



	reg = wm8400_read(codec, WM8400_FLL_CONTROL_1);

	reg = snd_soc_read(codec, WM8400_FLL_CONTROL_1);

	reg &= ~WM8400_FLL_OSC_ENA;

	wm8400_write(codec, WM8400_FLL_CONTROL_1, reg);

	snd_soc_write(codec, WM8400_FLL_CONTROL_1, reg);



	if (!freq_out)

		return 0;
@@ -1035,15 +1035,15 @@ static int wm8400_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 
	reg &= ~(WM8400_FLL_REF_FREQ | WM8400_FLL_FRATIO_MASK);

	reg |= WM8400_FLL_FRAC | factors.fratio;

	reg |= factors.freq_ref << WM8400_FLL_REF_FREQ_SHIFT;

	wm8400_write(codec, WM8400_FLL_CONTROL_1, reg);

	snd_soc_write(codec, WM8400_FLL_CONTROL_1, reg);



	wm8400_write(codec, WM8400_FLL_CONTROL_2, factors.k);

	wm8400_write(codec, WM8400_FLL_CONTROL_3, factors.n);

	snd_soc_write(codec, WM8400_FLL_CONTROL_2, factors.k);

	snd_soc_write(codec, WM8400_FLL_CONTROL_3, factors.n);



	reg = wm8400_read(codec, WM8400_FLL_CONTROL_4);

	reg = snd_soc_read(codec, WM8400_FLL_CONTROL_4);

	reg &= ~WM8400_FLL_OUTDIV_MASK;

	reg |= factors.outdiv;

	wm8400_write(codec, WM8400_FLL_CONTROL_4, reg);

	snd_soc_write(codec, WM8400_FLL_CONTROL_4, reg);



	return 0;

}
@@ -1057,8 +1057,8 @@ static int wm8400_set_dai_fmt(struct snd_soc_dai *codec_dai, 
	struct snd_soc_codec *codec = codec_dai->codec;

	u16 audio1, audio3;



	audio1 = wm8400_read(codec, WM8400_AUDIO_INTERFACE_1);

	audio3 = wm8400_read(codec, WM8400_AUDIO_INTERFACE_3);

	audio1 = snd_soc_read(codec, WM8400_AUDIO_INTERFACE_1);

	audio3 = snd_soc_read(codec, WM8400_AUDIO_INTERFACE_3);



	/* set master/slave audio interface */

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@@ -1099,8 +1099,8 @@ static int wm8400_set_dai_fmt(struct snd_soc_dai *codec_dai, 
		return -EINVAL;

	}



	wm8400_write(codec, WM8400_AUDIO_INTERFACE_1, audio1);

	wm8400_write(codec, WM8400_AUDIO_INTERFACE_3, audio3);

	snd_soc_write(codec, WM8400_AUDIO_INTERFACE_1, audio1);

	snd_soc_write(codec, WM8400_AUDIO_INTERFACE_3, audio3);

	return 0;

}
@@ -1112,24 +1112,24 @@ static int wm8400_set_dai_clkdiv(struct snd_soc_dai *codec_dai, 


	switch (div_id) {

	case WM8400_MCLK_DIV:

		reg = wm8400_read(codec, WM8400_CLOCKING_2) &

		reg = snd_soc_read(codec, WM8400_CLOCKING_2) &

			~WM8400_MCLK_DIV_MASK;

		wm8400_write(codec, WM8400_CLOCKING_2, reg | div);

		snd_soc_write(codec, WM8400_CLOCKING_2, reg | div);

		break;

	case WM8400_DACCLK_DIV:

		reg = wm8400_read(codec, WM8400_CLOCKING_2) &

		reg = snd_soc_read(codec, WM8400_CLOCKING_2) &

			~WM8400_DAC_CLKDIV_MASK;

		wm8400_write(codec, WM8400_CLOCKING_2, reg | div);

		snd_soc_write(codec, WM8400_CLOCKING_2, reg | div);

		break;

	case WM8400_ADCCLK_DIV:

		reg = wm8400_read(codec, WM8400_CLOCKING_2) &

		reg = snd_soc_read(codec, WM8400_CLOCKING_2) &

			~WM8400_ADC_CLKDIV_MASK;

		wm8400_write(codec, WM8400_CLOCKING_2, reg | div);

		snd_soc_write(codec, WM8400_CLOCKING_2, reg | div);

		break;

	case WM8400_BCLK_DIV:

		reg = wm8400_read(codec, WM8400_CLOCKING_1) &

		reg = snd_soc_read(codec, WM8400_CLOCKING_1) &

			~WM8400_BCLK_DIV_MASK;

		wm8400_write(codec, WM8400_CLOCKING_1, reg | div);

		snd_soc_write(codec, WM8400_CLOCKING_1, reg | div);

		break;

	default:

		return -EINVAL;
@@ -1146,7 +1146,7 @@ static int wm8400_hw_params(struct snd_pcm_substream *substream, 
	struct snd_soc_dai *dai)

{

	struct snd_soc_codec *codec = dai->codec;

	u16 audio1 = wm8400_read(codec, WM8400_AUDIO_INTERFACE_1);

	u16 audio1 = snd_soc_read(codec, WM8400_AUDIO_INTERFACE_1);



	audio1 &= ~WM8400_AIF_WL_MASK;

	/* bit size */
@@ -1164,19 +1164,19 @@ static int wm8400_hw_params(struct snd_pcm_substream *substream, 
		break;

	}



	wm8400_write(codec, WM8400_AUDIO_INTERFACE_1, audio1);

	snd_soc_write(codec, WM8400_AUDIO_INTERFACE_1, audio1);

	return 0;

}



static int wm8400_mute(struct snd_soc_dai *dai, int mute)

{

	struct snd_soc_codec *codec = dai->codec;

	u16 val = wm8400_read(codec, WM8400_DAC_CTRL) & ~WM8400_DAC_MUTE;

	u16 val = snd_soc_read(codec, WM8400_DAC_CTRL) & ~WM8400_DAC_MUTE;



	if (mute)

		wm8400_write(codec, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE);

		snd_soc_write(codec, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE);

	else

		wm8400_write(codec, WM8400_DAC_CTRL, val);

		snd_soc_write(codec, WM8400_DAC_CTRL, val);



	return 0;

}
@@ -1195,9 +1195,9 @@ static int wm8400_set_bias_level(struct snd_soc_codec *codec, 


	case SND_SOC_BIAS_PREPARE:

		/* VMID=2*50k */

		val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1) &

		val = snd_soc_read(codec, WM8400_POWER_MANAGEMENT_1) &

			~WM8400_VMID_MODE_MASK;

		wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val | 0x2);

		snd_soc_write(codec, WM8400_POWER_MANAGEMENT_1, val | 0x2);

		break;



	case SND_SOC_BIAS_STANDBY:
@@ -1211,74 +1211,74 @@ static int wm8400_set_bias_level(struct snd_soc_codec *codec, 
				return ret;

			}



			wm8400_write(codec, WM8400_POWER_MANAGEMENT_1,

			snd_soc_write(codec, WM8400_POWER_MANAGEMENT_1,

				     WM8400_CODEC_ENA | WM8400_SYSCLK_ENA);



			/* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */

			wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |

			snd_soc_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |

				     WM8400_BUFDCOPEN | WM8400_POBCTRL);



			msleep(50);



			/* Enable VREF & VMID at 2x50k */

			val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1);

			val = snd_soc_read(codec, WM8400_POWER_MANAGEMENT_1);

			val |= 0x2 | WM8400_VREF_ENA;

			wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);

			snd_soc_write(codec, WM8400_POWER_MANAGEMENT_1, val);



			/* Enable BUFIOEN */

			wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |

			snd_soc_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |

				     WM8400_BUFDCOPEN | WM8400_POBCTRL |

				     WM8400_BUFIOEN);



			/* disable POBCTRL, SOFT_ST and BUFDCOPEN */

			wm8400_write(codec, WM8400_ANTIPOP2, WM8400_BUFIOEN);

			snd_soc_write(codec, WM8400_ANTIPOP2, WM8400_BUFIOEN);

		}



		/* VMID=2*300k */

		val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1) &

		val = snd_soc_read(codec, WM8400_POWER_MANAGEMENT_1) &

			~WM8400_VMID_MODE_MASK;

		wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val | 0x4);

		snd_soc_write(codec, WM8400_POWER_MANAGEMENT_1, val | 0x4);

		break;



	case SND_SOC_BIAS_OFF:

		/* Enable POBCTRL and SOFT_ST */

		wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |

		snd_soc_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |

			WM8400_POBCTRL | WM8400_BUFIOEN);



		/* Enable POBCTRL, SOFT_ST and BUFDCOPEN */

		wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |

		snd_soc_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |

			WM8400_BUFDCOPEN | WM8400_POBCTRL |

			WM8400_BUFIOEN);



		/* mute DAC */

		val = wm8400_read(codec, WM8400_DAC_CTRL);

		wm8400_write(codec, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE);

		val = snd_soc_read(codec, WM8400_DAC_CTRL);

		snd_soc_write(codec, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE);



		/* Enable any disabled outputs */

		val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1);

		val = snd_soc_read(codec, WM8400_POWER_MANAGEMENT_1);

		val |= WM8400_SPK_ENA | WM8400_OUT3_ENA |

			WM8400_OUT4_ENA | WM8400_LOUT_ENA |

			WM8400_ROUT_ENA;

		wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);

		snd_soc_write(codec, WM8400_POWER_MANAGEMENT_1, val);



		/* Disable VMID */

		val &= ~WM8400_VMID_MODE_MASK;

		wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);

		snd_soc_write(codec, WM8400_POWER_MANAGEMENT_1, val);



		msleep(300);



		/* Enable all output discharge bits */

		wm8400_write(codec, WM8400_ANTIPOP1, WM8400_DIS_LLINE |

		snd_soc_write(codec, WM8400_ANTIPOP1, WM8400_DIS_LLINE |

			WM8400_DIS_RLINE | WM8400_DIS_OUT3 |

			WM8400_DIS_OUT4 | WM8400_DIS_LOUT |

			WM8400_DIS_ROUT);



		/* Disable VREF */

		val &= ~WM8400_VREF_ENA;

		wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);

		snd_soc_write(codec, WM8400_POWER_MANAGEMENT_1, val);



		/* disable POBCTRL, SOFT_ST and BUFDCOPEN */

		wm8400_write(codec, WM8400_ANTIPOP2, 0x0);

		snd_soc_write(codec, WM8400_ANTIPOP2, 0x0);



		ret = regulator_bulk_disable(ARRAY_SIZE(power),

					     &power[0]);
@@ -1384,19 +1384,19 @@ static int wm8400_codec_probe(struct snd_soc_codec *codec) 


	wm8400_codec_reset(codec);



	reg = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1);

	wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, reg | WM8400_CODEC_ENA);

	reg = snd_soc_read(codec, WM8400_POWER_MANAGEMENT_1);

	snd_soc_write(codec, WM8400_POWER_MANAGEMENT_1, reg | WM8400_CODEC_ENA);



	/* Latch volume update bits */

	reg = wm8400_read(codec, WM8400_LEFT_LINE_INPUT_1_2_VOLUME);

	wm8400_write(codec, WM8400_LEFT_LINE_INPUT_1_2_VOLUME,

	reg = snd_soc_read(codec, WM8400_LEFT_LINE_INPUT_1_2_VOLUME);

	snd_soc_write(codec, WM8400_LEFT_LINE_INPUT_1_2_VOLUME,

		     reg & WM8400_IPVU);

	reg = wm8400_read(codec, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME);

	wm8400_write(codec, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME,

	reg = snd_soc_read(codec, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME);

	snd_soc_write(codec, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME,

		     reg & WM8400_IPVU);



	wm8400_write(codec, WM8400_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));

	wm8400_write(codec, WM8400_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));

	snd_soc_write(codec, WM8400_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));

	snd_soc_write(codec, WM8400_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));



	if (!schedule_work(&priv->work)) {

		ret = -EINVAL;
@@ -1413,8 +1413,8 @@ static int wm8400_codec_remove(struct snd_soc_codec *codec) 
{

	u16 reg;



	reg = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1);

	wm8400_write(codec, WM8400_POWER_MANAGEMENT_1,

	reg = snd_soc_read(codec, WM8400_POWER_MANAGEMENT_1);

	snd_soc_write(codec, WM8400_POWER_MANAGEMENT_1,

		     reg & (~WM8400_CODEC_ENA));



	regulator_bulk_free(ARRAY_SIZE(power), power);
@@ -1427,7 +1427,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8400 = { 
	.remove =	wm8400_codec_remove,

	.suspend =	wm8400_suspend,

	.resume =	wm8400_resume,

	.read = wm8400_read,

	.read = snd_soc_read,

	.write = wm8400_write,

	.set_bias_level = wm8400_set_bias_level,

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