arm64: dts: meson-g12-common: add spicc controller nodes (5fa86f4f) · Commits · 戴 / test

arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi

+75 −0

Original line number	Diff line number	Diff line
		@@ -957,6 +957,57 @@
		};
		};

		spicc0_x_pins: spicc0-x {
		mux {
		groups = "spi0_mosi_x",
		"spi0_miso_x",
		"spi0_clk_x";
		function = "spi0";
		drive-strength-microamp = <4000>;
		bias-disable;
		};
		};

		spicc0_ss0_x_pins: spicc0-ss0-x {
		mux {
		groups = "spi0_ss0_x";
		function = "spi0";
		drive-strength-microamp = <4000>;
		bias-disable;
		};
		};

		spicc0_c_pins: spicc0-c {
		mux {
		groups = "spi0_mosi_c",
		"spi0_miso_c",
		"spi0_ss0_c",
		"spi0_clk_c";
		function = "spi0";
		drive-strength-microamp = <4000>;
		bias-disable;
		};
		};

		spicc1_pins: spicc1 {
		mux {
		groups = "spi1_mosi",
		"spi1_miso",
		"spi1_clk";
		function = "spi1";
		drive-strength-microamp = <4000>;
		};
		};

		spicc1_ss0_pins: spicc1-ss0 {
		mux {
		groups = "spi1_ss0";
		function = "spi1";
		drive-strength-microamp = <4000>;
		bias-disable;
		};
		};

		tdm_a_din0_pins: tdm-a-din0 {
		mux {
		groups = "tdm_a_din0";
		@@ -2051,6 +2102,30 @@
		amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
		};

		spicc0: spi@13000 {
		compatible = "amlogic,meson-g12a-spicc";
		reg = <0x0 0x13000 0x0 0x44>;
		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clkc CLKID_SPICC0>,
		<&clkc CLKID_SPICC0_SCLK>;
		clock-names = "core", "pclk";
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
		};

		spicc1: spi@15000 {
		compatible = "amlogic,meson-g12a-spicc";
		reg = <0x0 0x15000 0x0 0x44>;
		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clkc CLKID_SPICC1>,
		<&clkc CLKID_SPICC1_SCLK>;
		clock-names = "core", "pclk";
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
		};

		pwm_ef: pwm@19000 {
		compatible = "amlogic,meson-g12a-ee-pwm";
		reg = <0x0 0x19000 0x0 0x20>;

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