Commit 5f9e8828 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai
Browse files

ARM: dts: sun8i: r40: Add RTC device node 



The R40 has an RTC hardware block, which has additional registers
that are not related to RTC or clock functions, and is otherwise
compatible with the H3's RTC.

Add a device node for it, and fix up any references to the LOSC.

Acked-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Tested-by: default avatarCorentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent 507c6e89

arch/arm/boot/dts/sun8i-r40.dtsi

+13 −3
Original line number Diff line number Diff line
@@ -70,7 +70,7 @@ 
			compatible = "fixed-clock";

			clock-frequency = <32768>;

			clock-accuracy = <20000>;

			clock-output-names = "osc32k";

			clock-output-names = "ext-osc32k";

		};

	};
@@ -315,17 +315,27 @@ 
		ccu: clock@1c20000 {

			compatible = "allwinner,sun8i-r40-ccu";

			reg = <0x01c20000 0x400>;

			clocks = <&osc24M>, <&osc32k>;

			clocks = <&osc24M>, <&rtc 0>;

			clock-names = "hosc", "losc";

			#clock-cells = <1>;

			#reset-cells = <1>;

		};



		rtc: rtc@1c20400 {

			compatible = "allwinner,sun8i-r40-rtc",

				     "allwinner,sun8i-h3-rtc";

			reg = <0x01c20400 0x400>;

			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

			clock-output-names = "osc32k", "osc32k-out";

			clocks = <&osc32k>;

			#clock-cells = <1>;

		};



		pio: pinctrl@1c20800 {

			compatible = "allwinner,sun8i-r40-pinctrl";

			reg = <0x01c20800 0x400>;

			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;

			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;

			clock-names = "apb", "hosc", "losc";

			gpio-controller;

			interrupt-controller;

CRA Git | Maintained and supported by SUSTech CRA and CCSE