Commit 5f78e4d3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-linus' of... 

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86-bigbox-pci

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86-bigbox-pci:
  x86: add pci=check_enable_amd_mmconf and dmi check
  x86: work around io allocation overlap of HT links
  acpi: get boot_cpu_id as early for k8_scan_nodes
  x86_64: don't need set default res if only have one root bus
  x86: double check the multi root bus with fam10h mmconf
  x86: multi pci root bus with different io resource range, on 64-bit
  x86: use bus conf in NB conf fun1 to get bus range on, on 64-bit
  x86: get mp_bus_to_node early
  x86 pci: remove checking type for mmconfig probe
  x86: remove unneeded check in mmconf reject
  driver core: try parent numa_node at first before using default
  x86: seperate mmconf for fam10h out from setup_64.c
  x86: if acpi=off, force setting the mmconf for fam10h
  x86_64: check MSR to get MMCONFIG for AMD Family 10h
  x86_64: check and enable MMCONFIG for AMD Family 10h
  x86_64: set cfg_size for AMD Family 10h in case MMCONFIG
  x86: mmconf enable mcfg early
  x86: clear pci_mmcfg_virt when mmcfg get rejected
  x86: validate against acpi motherboard resources

Fixed up fairly trivial conflicts in arch/x86/pci/{init.c,pci.h} due to
OLPC support manually.
parents 867a89e0 5f0b2976

arch/x86/kernel/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -103,4 +103,6 @@ ifeq ($(CONFIG_X86_64),y) 
        obj-$(CONFIG_GART_IOMMU)	+= pci-gart_64.o aperture_64.o

        obj-$(CONFIG_CALGARY_IOMMU)	+= pci-calgary_64.o tce_64.o

        obj-$(CONFIG_SWIOTLB)		+= pci-swiotlb_64.o



        obj-$(CONFIG_PCI_MMCONFIG)	+= mmconf-fam10h_64.o

endif

arch/x86/kernel/acpi/boot.c

+70 −0
Original line number Diff line number Diff line
@@ -771,6 +771,32 @@ static void __init acpi_register_lapic_address(unsigned long address) 
		boot_cpu_physical_apicid  = GET_APIC_ID(read_apic_id());

}



static int __init early_acpi_parse_madt_lapic_addr_ovr(void)

{

	int count;



	if (!cpu_has_apic)

		return -ENODEV;



	/*

	 * Note that the LAPIC address is obtained from the MADT (32-bit value)

	 * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value).

	 */



	count =

	    acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,

				  acpi_parse_lapic_addr_ovr, 0);

	if (count < 0) {

		printk(KERN_ERR PREFIX

		       "Error parsing LAPIC address override entry\n");

		return count;

	}



	acpi_register_lapic_address(acpi_lapic_addr);



	return count;

}



static int __init acpi_parse_madt_lapic_entries(void)

{

	int count;
@@ -901,6 +927,33 @@ static inline int acpi_parse_madt_ioapic_entries(void) 
}

#endif	/* !CONFIG_X86_IO_APIC */



static void __init early_acpi_process_madt(void)

{

#ifdef CONFIG_X86_LOCAL_APIC

	int error;



	if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {



		/*

		 * Parse MADT LAPIC entries

		 */

		error = early_acpi_parse_madt_lapic_addr_ovr();

		if (!error) {

			acpi_lapic = 1;

			smp_found_config = 1;

		}

		if (error == -EINVAL) {

			/*

			 * Dell Precision Workstation 410, 610 come here.

			 */

			printk(KERN_ERR PREFIX

			       "Invalid BIOS MADT, disabling ACPI\n");

			disable_acpi();

		}

	}

#endif

}



static void __init acpi_process_madt(void)

{

#ifdef CONFIG_X86_LOCAL_APIC
@@ -1233,6 +1286,23 @@ int __init acpi_boot_table_init(void) 
	return 0;

}



int __init early_acpi_boot_init(void)

{

	/*

	 * If acpi_disabled, bail out

	 * One exception: acpi=ht continues far enough to enumerate LAPICs

	 */

	if (acpi_disabled && !acpi_ht)

		return 1;



	/*

	 * Process the Multiple APIC Description Table (MADT), if present

	 */

	early_acpi_process_madt();



	return 0;

}



int __init acpi_boot_init(void)

{

	/*

arch/x86/kernel/mmconf-fam10h_64.c

0 → 100644
+243 −0
Original line number Diff line number Diff line 
/*

 * AMD Family 10h mmconfig enablement

 */



#include <linux/types.h>

#include <linux/mm.h>

#include <linux/string.h>

#include <linux/pci.h>

#include <linux/dmi.h>

#include <asm/pci-direct.h>

#include <linux/sort.h>

#include <asm/io.h>

#include <asm/msr.h>

#include <asm/acpi.h>



#include "../pci/pci.h"



struct pci_hostbridge_probe {

	u32 bus;

	u32 slot;

	u32 vendor;

	u32 device;

};



static u64 __cpuinitdata fam10h_pci_mmconf_base;

static int __cpuinitdata fam10h_pci_mmconf_base_status;



static struct pci_hostbridge_probe pci_probes[] __cpuinitdata = {

	{ 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 },

	{ 0xff, 0, PCI_VENDOR_ID_AMD, 0x1200 },

};



struct range {

	u64 start;

	u64 end;

};



static int __cpuinit cmp_range(const void *x1, const void *x2)

{

	const struct range *r1 = x1;

	const struct range *r2 = x2;

	int start1, start2;



	start1 = r1->start >> 32;

	start2 = r2->start >> 32;



	return start1 - start2;

}



/*[47:0] */

/* need to avoid (0xfd<<32) and (0xfe<<32), ht used space */

#define FAM10H_PCI_MMCONF_BASE (0xfcULL<<32)

#define BASE_VALID(b) ((b != (0xfdULL << 32)) && (b != (0xfeULL << 32)))

static void __cpuinit get_fam10h_pci_mmconf_base(void)

{

	int i;

	unsigned bus;

	unsigned slot;

	int found;



	u64 val;

	u32 address;

	u64 tom2;

	u64 base = FAM10H_PCI_MMCONF_BASE;



	int hi_mmio_num;

	struct range range[8];



	/* only try to get setting from BSP */

	/* -1 or 1 */

	if (fam10h_pci_mmconf_base_status)

		return;



	if (!early_pci_allowed())

		goto fail;



	found = 0;

	for (i = 0; i < ARRAY_SIZE(pci_probes); i++) {

		u32 id;

		u16 device;

		u16 vendor;



		bus = pci_probes[i].bus;

		slot = pci_probes[i].slot;

		id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);



		vendor = id & 0xffff;

		device = (id>>16) & 0xffff;

		if (pci_probes[i].vendor == vendor &&

		    pci_probes[i].device == device) {

			found = 1;

			break;

		}

	}



	if (!found)

		goto fail;



	/* SYS_CFG */

	address = MSR_K8_SYSCFG;

	rdmsrl(address, val);



	/* TOP_MEM2 is not enabled? */

	if (!(val & (1<<21))) {

		tom2 = 0;

	} else {

		/* TOP_MEM2 */

		address = MSR_K8_TOP_MEM2;

		rdmsrl(address, val);

		tom2 = val & (0xffffULL<<32);

	}



	if (base <= tom2)

		base = tom2 + (1ULL<<32);



	/*

	 * need to check if the range is in the high mmio range that is

	 * above 4G

	 */

	hi_mmio_num = 0;

	for (i = 0; i < 8; i++) {

		u32 reg;

		u64 start;

		u64 end;

		reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3));

		if (!(reg & 3))

			continue;



		start = (((u64)reg) << 8) & (0xffULL << 32); /* 39:16 on 31:8*/

		reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3));

		end = (((u64)reg) << 8) & (0xffULL << 32); /* 39:16 on 31:8*/



		if (!end)

			continue;



		range[hi_mmio_num].start = start;

		range[hi_mmio_num].end = end;

		hi_mmio_num++;

	}



	if (!hi_mmio_num)

		goto out;



	/* sort the range */

	sort(range, hi_mmio_num, sizeof(struct range), cmp_range, NULL);



	if (range[hi_mmio_num - 1].end < base)

		goto out;

	if (range[0].start > base)

		goto out;



	/* need to find one window */

	base = range[0].start - (1ULL << 32);

	if ((base > tom2) && BASE_VALID(base))

		goto out;

	base = range[hi_mmio_num - 1].end + (1ULL << 32);

	if ((base > tom2) && BASE_VALID(base))

		goto out;

	/* need to find window between ranges */

	if (hi_mmio_num > 1)

	for (i = 0; i < hi_mmio_num - 1; i++) {

		if (range[i + 1].start > (range[i].end + (1ULL << 32))) {

			base = range[i].end + (1ULL << 32);

			if ((base > tom2) && BASE_VALID(base))

				goto out;

		}

	}



fail:

	fam10h_pci_mmconf_base_status = -1;

	return;

out:

	fam10h_pci_mmconf_base = base;

	fam10h_pci_mmconf_base_status = 1;

}



void __cpuinit fam10h_check_enable_mmcfg(void)

{

	u64 val;

	u32 address;



	if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))

		return;



	address = MSR_FAM10H_MMIO_CONF_BASE;

	rdmsrl(address, val);



	/* try to make sure that AP's setting is identical to BSP setting */

	if (val & FAM10H_MMIO_CONF_ENABLE) {

		unsigned busnbits;

		busnbits = (val >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &

			FAM10H_MMIO_CONF_BUSRANGE_MASK;



		/* only trust the one handle 256 buses, if acpi=off */

		if (!acpi_pci_disabled || busnbits >= 8) {

			u64 base;

			base = val & (0xffffULL << 32);

			if (fam10h_pci_mmconf_base_status <= 0) {

				fam10h_pci_mmconf_base = base;

				fam10h_pci_mmconf_base_status = 1;

				return;

			} else if (fam10h_pci_mmconf_base ==  base)

				return;

		}

	}



	/*

	 * if it is not enabled, try to enable it and assume only one segment

	 * with 256 buses

	 */

	get_fam10h_pci_mmconf_base();

	if (fam10h_pci_mmconf_base_status <= 0)

		return;



	printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n");

	val &= ~((FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT) |

	     (FAM10H_MMIO_CONF_BUSRANGE_MASK<<FAM10H_MMIO_CONF_BUSRANGE_SHIFT));

	val |= fam10h_pci_mmconf_base | (8 << FAM10H_MMIO_CONF_BUSRANGE_SHIFT) |

	       FAM10H_MMIO_CONF_ENABLE;

	wrmsrl(address, val);

}



static int __devinit set_check_enable_amd_mmconf(const struct dmi_system_id *d)

{

        pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;

        return 0;

}



static struct dmi_system_id __devinitdata mmconf_dmi_table[] = {

        {

                .callback = set_check_enable_amd_mmconf,

                .ident = "Sun Microsystems Machine",

                .matches = {

                        DMI_MATCH(DMI_SYS_VENDOR, "Sun Microsystems"),

                },

        },

	{}

};



void __init check_enable_amd_mmconf_dmi(void)

{

	dmi_check_system(mmconf_dmi_table);

}

arch/x86/kernel/setup_64.c

+20 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include <linux/crash_dump.h>

#include <linux/root_dev.h>

#include <linux/pci.h>

#include <asm/pci-direct.h>

#include <linux/efi.h>

#include <linux/acpi.h>

#include <linux/kallsyms.h>
@@ -40,6 +41,7 @@ 
#include <linux/dmi.h>

#include <linux/dma-mapping.h>

#include <linux/ctype.h>

#include <linux/sort.h>

#include <linux/uaccess.h>

#include <linux/init_ohci1394_dma.h>

#include <linux/kvm_para.h>
@@ -288,6 +290,18 @@ static void __init parse_setup_data(void) 
	}

}



#ifdef CONFIG_PCI_MMCONFIG

extern void __cpuinit fam10h_check_enable_mmcfg(void);

extern void __init check_enable_amd_mmconf_dmi(void);

#else

void __cpuinit fam10h_check_enable_mmcfg(void)

{

}

void __init check_enable_amd_mmconf_dmi(void)

{

}

#endif



/*

 * setup_arch - architecture-specific boot-time initializations

 *
@@ -515,6 +529,9 @@ void __init setup_arch(char **cmdline_p) 
	conswitchp = &dummy_con;

#endif

#endif



	/* do this before identify_cpu for boot cpu */

	check_enable_amd_mmconf_dmi();

}



static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
@@ -767,6 +784,9 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) 
	/* MFENCE stops RDTSC speculation */

	set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);



	if (c->x86 == 0x10)

		fam10h_check_enable_mmcfg();



	if (amd_apic_timer_broken())

		disable_apic_timer = 1;

arch/x86/mm/k8topology_64.c

+37 −1
Original line number Diff line number Diff line
@@ -13,12 +13,15 @@ 
#include <linux/nodemask.h>

#include <asm/io.h>

#include <linux/pci_ids.h>

#include <linux/acpi.h>

#include <asm/types.h>

#include <asm/mmzone.h>

#include <asm/proto.h>

#include <asm/e820.h>

#include <asm/pci-direct.h>

#include <asm/numa.h>

#include <asm/mpspec.h>

#include <asm/apic.h>



static __init int find_northbridge(void)

{
@@ -44,6 +47,30 @@ static __init int find_northbridge(void) 
	return -1;

}



static __init void early_get_boot_cpu_id(void)

{

	/*

	 * need to get boot_cpu_id so can use that to create apicid_to_node

	 * in k8_scan_nodes()

	 */

	/*

	 * Find possible boot-time SMP configuration:

	 */

	early_find_smp_config();

#ifdef CONFIG_ACPI

	/*

	 * Read APIC information from ACPI tables.

	 */

	early_acpi_boot_init();

#endif

	/*

	 * get boot-time SMP configuration:

	 */

	if (smp_found_config)

		early_get_smp_config();

	early_init_lapic_mapping();

}



int __init k8_scan_nodes(unsigned long start, unsigned long end)

{

	unsigned long prevbase;
@@ -56,6 +83,7 @@ int __init k8_scan_nodes(unsigned long start, unsigned long end) 
	unsigned cores;

	unsigned bits;

	int j;

	unsigned apicid_base;



	if (!early_pci_allowed())

		return -1;
@@ -174,11 +202,19 @@ int __init k8_scan_nodes(unsigned long start, unsigned long end) 
	/* use the coreid bits from early_identify_cpu */

	bits = boot_cpu_data.x86_coreid_bits;

	cores = (1<<bits);

	apicid_base = 0;

	/* need to get boot_cpu_id early for system with apicid lifting */

	early_get_boot_cpu_id();

	if (boot_cpu_physical_apicid > 0) {

		printk(KERN_INFO "BSP APIC ID: %02x\n",

				 boot_cpu_physical_apicid);

		apicid_base = boot_cpu_physical_apicid;

	}



	for (i = 0; i < 8; i++) {

		if (nodes[i].start != nodes[i].end) {

			nodeid = nodeids[i];

			for (j = 0; j < cores; j++)

			for (j = apicid_base; j < cores + apicid_base; j++)

				apicid_to_node[(nodeid << bits) + j] = i;

			setup_node_bootmem(i, nodes[i].start, nodes[i].end);

		}

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