Commit 5f6b33f4 authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Alexandre Belloni
Browse files

ARM: dts: sam9x60: add rtt 



Add RTT. Allong with it enable GBPR as it is requested by RTT.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1591779936-18577-4-git-send-email-claudiu.beznea@microchip.com
parent 73554069

arch/arm/boot/dts/at91-sam9x60ek.dts

+9 −0
Original line number Diff line number Diff line
@@ -309,6 +309,10 @@ 
	};

};



&gpbr {

	status = "okay";

};



&i2s {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2s_default>;
@@ -636,6 +640,11 @@ 
	};

};



&rtt {

	atmel,rtt-rtc-time-reg = <&gpbr 0x0>;

	status = "okay";

};



&shutdown_controller {

	atmel,shdwc-debouncer = <976>;

	status = "okay";

arch/arm/boot/dts/sam9x60.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -661,6 +661,13 @@ 
				status = "disabled";

			};



			rtt: rtt@fffffe20 {

				compatible = "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";

				reg = <0xfffffe20 0x20>;

				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

				clocks = <&clk32k 0>;

			};



			pit: timer@fffffe40 {

				compatible = "atmel,at91sam9260-pit";

				reg = <0xfffffe40 0x10>;

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