Commit 5f67317b authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Shawn Guo
Browse files

arm64: dts: imx8mm: correct interrupt flags 



GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW  = 1 = IRQ_TYPE_EDGE_RISING

Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
  ACTIVE_LOW  => IRQ_TYPE_LEVEL_LOW
  ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH

In case of level low interrupts, enable also internal pull up.  It is
required at least on imx8mm-evk, according to schematics.

The schematics for Variscite imx8mm-var-som are not available and
I was unable to get proper configuration from Variscite.

Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Acked-By: default avatarTim Harvey <tharvey@gateworks.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 1d93b292

arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ 
		reg = <0x4b>;

		pinctrl-0 = <&pinctrl_pmic>;

		interrupt-parent = <&gpio1>;

		interrupts = <3 GPIO_ACTIVE_LOW>;

		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

		rohm,reset-snvs-powered;



		regulators {
@@ -292,7 +292,7 @@ 


		pinctrl_pmic: pmicirqgrp {

			fsl,pins = <

				MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x41

				MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x141

			>;

		};

arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -123,7 +123,7 @@ 
		reg = <0x4b>;

		pinctrl-0 = <&pinctrl_pmic>;

		interrupt-parent = <&gpio1>;

		interrupts = <3 GPIO_ACTIVE_LOW>;

		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

		rohm,reset-snvs-powered;



		#clock-cells = <0>;
@@ -392,7 +392,7 @@ 


	pinctrl_pmic: pmicirqgrp {

		fsl,pins = <

			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x41

			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x141

		>;

	};

arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts

+1 −1
Original line number Diff line number Diff line
@@ -129,7 +129,7 @@ 
		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_captouch>;

		interrupt-parent = <&gpio5>;

		interrupts = <4 GPIO_ACTIVE_HIGH>;

		interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;



		touchscreen-size-x = <800>;

		touchscreen-size-y = <480>;

arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi

+5 −1
Original line number Diff line number Diff line
@@ -137,7 +137,11 @@ 
		reg = <0x4b>;

		pinctrl-0 = <&pinctrl_pmic>;

		interrupt-parent = <&gpio2>;

		interrupts = <8 GPIO_ACTIVE_LOW>;

		/*

		 * The interrupt is not correct. It should be level low,

		 * however with internal pull up this causes IRQ storm.

		 */

		interrupts = <8 IRQ_TYPE_EDGE_RISING>;

		rohm,reset-snvs-powered;



		#clock-cells = <0>;

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