Commit 5f3413fc authored by Felix Fietkau's avatar Felix Fietkau
Browse files

mt76: mt7615: reset rate index/counters on rate table update 



These values must be initialized to zero, otherwise the hardware could
reuse previous values, especially the rate index

Reviewed-by: default avatarRyder Lee <ryder.lee@mediatek.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 592ed85d

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

+4 −1
Original line number Diff line number Diff line
@@ -501,7 +501,10 @@ void mt7615_mac_set_rates(struct mt7615_dev *dev, struct mt7615_sta *sta, 
	w27 |= FIELD_PREP(MT_WTBL_W27_CC_BW_SEL, bw);



	w5 = mt76_rr(dev, addr + 5 * 4);

	w5 &= ~(MT_WTBL_W5_BW_CAP | MT_WTBL_W5_CHANGE_BW_RATE);

	w5 &= ~(MT_WTBL_W5_BW_CAP | MT_WTBL_W5_CHANGE_BW_RATE |

		MT_WTBL_W5_MPDU_OK_COUNT |

		MT_WTBL_W5_MPDU_FAIL_COUNT |

		MT_WTBL_W5_RATE_IDX);

	w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, bw) |

	      FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE, bw_idx ? bw_idx - 1 : 7);

drivers/net/wireless/mediatek/mt76/mt7615/regs.h

+4 −0
Original line number Diff line number Diff line
@@ -181,6 +181,10 @@ 
#define MT_WTBL_W5_SHORT_GI_80		BIT(10)

#define MT_WTBL_W5_SHORT_GI_160		BIT(11)

#define MT_WTBL_W5_BW_CAP		GENMASK(13, 12)

#define MT_WTBL_W5_MPDU_FAIL_COUNT	GENMASK(25, 23)

#define MT_WTBL_W5_MPDU_OK_COUNT	GENMASK(28, 26)

#define MT_WTBL_W5_RATE_IDX		GENMASK(31, 29)



#define MT_WTBL_W27_CC_BW_SEL		GENMASK(6, 5)



#define MT_EFUSE_BASE			0x81070000

CRA Git | Maintained and supported by SUSTech CRA and CCSE