staging: comedi: ni_stc.h: tidy up IO_Bidirection_Pin_Register (5ecadf8c) · Commits · 戴 / test

drivers/staging/comedi/drivers/ni_mio_common.c

+5 −5

Original line number	Diff line number	Diff line
		@@ -353,7 +353,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
		[NISTC_AO_UC_LOADA_REG] = { 0x160, 4 },
		[NISTC_AO_UC_LOADB_REG] = { 0x164, 4 },
		[NISTC_CLK_FOUT_REG] = { 0x170, 2 },
		[IO_Bidirection_Pin_Register] = { 0x172, 2 },
		[NISTC_IO_BIDIR_PIN_REG] = { 0x172, 2 },
		[RTSI_Trig_Direction_Register] = { 0x174, 2 },
		[Interrupt_Control_Register] = { 0x176, 2 },
		[AI_Output_Control_Register] = { 0x178, 2 },
		@@ -542,7 +542,7 @@ static inline void ni_set_bitfield(struct comedi_device *dev, int reg,
		devpriv->int_b_enable_reg \|= bit_values & bit_mask;
		ni_stc_writew(dev, devpriv->int_b_enable_reg, reg);
		break;
		case IO_Bidirection_Pin_Register:
		case NISTC_IO_BIDIR_PIN_REG:
		devpriv->io_bidirection_pin_reg &= ~bit_mask;
		devpriv->io_bidirection_pin_reg \|= bit_values & bit_mask;
		ni_stc_writew(dev, devpriv->io_bidirection_pin_reg, reg);
		@@ -4434,10 +4434,10 @@ static int ni_pfi_insn_config(struct comedi_device *dev,

		switch (data[0]) {
		case COMEDI_OUTPUT:
		ni_set_bits(dev, IO_Bidirection_Pin_Register, 1 << chan, 1);
		ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, 1);
		break;
		case COMEDI_INPUT:
		ni_set_bits(dev, IO_Bidirection_Pin_Register, 1 << chan, 0);
		ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, 0);
		break;
		case INSN_CONFIG_DIO_QUERY:
		data[1] =
		@@ -5303,7 +5303,7 @@ static int ni_E_init(struct comedi_device *dev,
		}
		s->insn_config = ni_pfi_insn_config;

		ni_set_bits(dev, IO_Bidirection_Pin_Register, ~0, 0);
		ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, ~0, 0);

		/* cs5529 calibration adc */
		s = &dev->subdevices[NI_CS5529_CALIBRATION_SUBDEV];

drivers/staging/comedi/drivers/ni_stc.h

+2 −1

Original line number	Diff line number	Diff line
		@@ -276,6 +276,8 @@
		#define NISTC_CLK_FOUT_TO_DIVIDER(x) (((x) >> 0) & 0xf)
		#define NISTC_CLK_FOUT_DIVIDER_MASK NISTC_CLK_FOUT_DIVIDER(0xf)

		#define NISTC_IO_BIDIR_PIN_REG 57

		#define AI_Status_1_Register 2
		#define Interrupt_A_St 0x8000
		#define AI_FIFO_Full_St 0x4000
		@@ -334,7 +336,6 @@ enum Joint_Status_2_Bits {
		#define AO_BC_Save_Registers 18
		#define AO_UC_Save_Registers 20

		#define IO_Bidirection_Pin_Register 57
		#define RTSI_Trig_Direction_Register 58
		enum RTSI_Trig_Direction_Bits {
		Drive_RTSI_Clock_Bit = 0x1,

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