Commit 5eb297a9 authored by Intiyaz Basha's avatar Intiyaz Basha Committed by David S. Miller
Browse files

liquidio: Simplified napi poll



1) Moved interrupt enable related code from octeon_process_droq_poll_cmd()
   to separate function octeon_enable_irq().
2) Removed wrapper function octeon_process_droq_poll_cmd(), and directlyi
   using octeon_droq_process_poll_pkts().
3) Removed unused macros POLL_EVENT_XXX.

Signed-off-by: default avatarIntiyaz Basha <intiyaz.basha@cavium.com>
Signed-off-by: default avatarFelix Manlunas <felix.manlunas@cavium.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b8124b53
Loading
Loading
Loading
Loading
+2 −5
Original line number Diff line number Diff line
@@ -627,9 +627,7 @@ static int liquidio_napi_poll(struct napi_struct *napi, int budget)
	iq_no = droq->q_no;

	/* Handle Droq descriptors */
	work_done = octeon_process_droq_poll_cmd(oct, droq->q_no,
						 POLL_EVENT_PROCESS_PKTS,
						 budget);
	work_done = octeon_droq_process_poll_pkts(oct, droq, budget);

	/* Flush the instruction queue */
	iq = oct->instr_queue[iq_no];
@@ -660,8 +658,7 @@ static int liquidio_napi_poll(struct napi_struct *napi, int budget)
		tx_done = 1;
		napi_complete_done(napi, work_done);

		octeon_process_droq_poll_cmd(droq->oct_dev, droq->q_no,
					     POLL_EVENT_ENABLE_INTR, 0);
		octeon_enable_irq(droq->oct_dev, droq->q_no);
		return 0;
	}

+29 −54
Original line number Diff line number Diff line
@@ -788,7 +788,7 @@ octeon_droq_process_packets(struct octeon_device *oct,
 * called before calling this routine.
 */

static int
int
octeon_droq_process_poll_pkts(struct octeon_device *oct,
			      struct octeon_droq *droq, u32 budget)
{
@@ -835,71 +835,46 @@ octeon_droq_process_poll_pkts(struct octeon_device *oct,
	return total_pkts_processed;
}

/* Enable Pkt Interrupt */
int
octeon_process_droq_poll_cmd(struct octeon_device *oct, u32 q_no, int cmd,
			     u32 arg)
octeon_enable_irq(struct octeon_device *oct, u32 q_no)
{
	struct octeon_droq *droq;

	droq = oct->droq[q_no];

	if (cmd == POLL_EVENT_PROCESS_PKTS)
		return octeon_droq_process_poll_pkts(oct, droq, arg);

	if (cmd == POLL_EVENT_PENDING_PKTS) {
		u32 pkt_cnt = atomic_read(&droq->pkts_pending);

		return  octeon_droq_process_packets(oct, droq, pkt_cnt);
	}

	if (cmd == POLL_EVENT_ENABLE_INTR) {
		u32 value;
		unsigned long flags;

		/* Enable Pkt Interrupt */
	switch (oct->chip_id) {
	case OCTEON_CN66XX:
	case OCTEON_CN68XX: {
		struct octeon_cn6xxx *cn6xxx =
			(struct octeon_cn6xxx *)oct->chip;
		unsigned long flags;
		u32 value;

		spin_lock_irqsave
			(&cn6xxx->lock_for_droq_int_enb_reg, flags);
			value =
				octeon_read_csr(oct,
						CN6XXX_SLI_PKT_TIME_INT_ENB);
		value = octeon_read_csr(oct, CN6XXX_SLI_PKT_TIME_INT_ENB);
		value |= (1 << q_no);
			octeon_write_csr(oct,
					 CN6XXX_SLI_PKT_TIME_INT_ENB,
					 value);
			value =
				octeon_read_csr(oct,
						CN6XXX_SLI_PKT_CNT_INT_ENB);
		octeon_write_csr(oct, CN6XXX_SLI_PKT_TIME_INT_ENB, value);
		value = octeon_read_csr(oct, CN6XXX_SLI_PKT_CNT_INT_ENB);
		value |= (1 << q_no);
			octeon_write_csr(oct,
					 CN6XXX_SLI_PKT_CNT_INT_ENB,
					 value);
		octeon_write_csr(oct, CN6XXX_SLI_PKT_CNT_INT_ENB, value);

		/* don't bother flushing the enables */

		spin_unlock_irqrestore
			(&cn6xxx->lock_for_droq_int_enb_reg, flags);
			return 0;
	}
		break;
		case OCTEON_CN23XX_PF_VID: {
	case OCTEON_CN23XX_PF_VID:
		lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]);
		}
		break;

	case OCTEON_CN23XX_VF_VID:
		lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]);
		break;
		}
		return 0;
	default:
		dev_err(&oct->pci_dev->dev, "%s Unknown Chip\n", __func__);
		return 1;
	}

	dev_err(&oct->pci_dev->dev, "%s Unknown command: %d\n", __func__, cmd);
	return -EINVAL;
	return 0;
}

int octeon_register_droq_ops(struct octeon_device *oct, u32 q_no,
+4 −7
Original line number Diff line number Diff line
@@ -123,11 +123,6 @@ struct oct_droq_stats {

};

#define POLL_EVENT_INTR_ARRIVED  1
#define POLL_EVENT_PROCESS_PKTS  2
#define POLL_EVENT_PENDING_PKTS  3
#define POLL_EVENT_ENABLE_INTR   4

/* The maximum number of buffers that can be dispatched from the
 * output/dma queue. Set to 64 assuming 1K buffers in DROQ and the fact that
 * max packet size from DROQ is 64K.
@@ -414,8 +409,10 @@ int octeon_droq_process_packets(struct octeon_device *oct,
				struct octeon_droq *droq,
				u32 budget);

int octeon_process_droq_poll_cmd(struct octeon_device *oct, u32 q_no,
				 int cmd, u32 arg);
int octeon_droq_process_poll_pkts(struct octeon_device *oct,
				  struct octeon_droq *droq, u32 budget);

int octeon_enable_irq(struct octeon_device *oct, u32 q_no);

void octeon_droq_check_oom(struct octeon_droq *droq);