Commit 5e7d4a84 authored by Drew Davenport's avatar Drew Davenport Committed by Rob Clark
Browse files

drm/msm/dpu: Remove unnecessary NULL checks 



The dpu_encoder_phys * argument passed to these functions will never be
NULL so don't check.

Signed-off-by: default avatarDrew Davenport <ddavenport@chromium.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 2b156481

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

+14 −55
Original line number Diff line number Diff line
@@ -45,7 +45,6 @@ static bool dpu_encoder_phys_cmd_mode_fixup( 
		const struct drm_display_mode *mode,

		struct drm_display_mode *adj_mode)

{

	if (phys_enc)

	DPU_DEBUG_CMDENC(to_dpu_encoder_phys_cmd(phys_enc), "\n");

	return true;

}
@@ -58,9 +57,6 @@ static void _dpu_encoder_phys_cmd_update_intf_cfg( 
	struct dpu_hw_ctl *ctl;

	struct dpu_hw_intf_cfg intf_cfg = { 0 };



	if (!phys_enc)

		return;



	ctl = phys_enc->hw_ctl;

	if (!ctl->ops.setup_intf_cfg)

		return;
@@ -79,7 +75,7 @@ static void dpu_encoder_phys_cmd_pp_tx_done_irq(void *arg, int irq_idx) 
	int new_cnt;

	u32 event = DPU_ENCODER_FRAME_EVENT_DONE;



	if (!phys_enc || !phys_enc->hw_pp)

	if (!phys_enc->hw_pp)

		return;



	DPU_ATRACE_BEGIN("pp_done_irq");
@@ -106,7 +102,7 @@ static void dpu_encoder_phys_cmd_pp_rd_ptr_irq(void *arg, int irq_idx) 
	struct dpu_encoder_phys *phys_enc = arg;

	struct dpu_encoder_phys_cmd *cmd_enc;



	if (!phys_enc || !phys_enc->hw_pp)

	if (!phys_enc->hw_pp)

		return;



	DPU_ATRACE_BEGIN("rd_ptr_irq");
@@ -125,9 +121,6 @@ static void dpu_encoder_phys_cmd_ctl_start_irq(void *arg, int irq_idx) 
{

	struct dpu_encoder_phys *phys_enc = arg;



	if (!phys_enc)

		return;



	DPU_ATRACE_BEGIN("ctl_start_irq");



	atomic_add_unless(&phys_enc->pending_ctlstart_cnt, -1, 0);
@@ -141,9 +134,6 @@ static void dpu_encoder_phys_cmd_underrun_irq(void *arg, int irq_idx) 
{

	struct dpu_encoder_phys *phys_enc = arg;



	if (!phys_enc)

		return;



	if (phys_enc->parent_ops->handle_underrun_virt)

		phys_enc->parent_ops->handle_underrun_virt(phys_enc->parent,

			phys_enc);
@@ -179,7 +169,7 @@ static void dpu_encoder_phys_cmd_mode_set( 
	struct dpu_encoder_phys_cmd *cmd_enc =

		to_dpu_encoder_phys_cmd(phys_enc);



	if (!phys_enc || !mode || !adj_mode) {

	if (!mode || !adj_mode) {

		DPU_ERROR("invalid args\n");

		return;

	}
@@ -198,7 +188,7 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout( 
	u32 frame_event = DPU_ENCODER_FRAME_EVENT_ERROR;

	bool do_log = false;



	if (!phys_enc || !phys_enc->hw_pp)

	if (!phys_enc->hw_pp)

		return -EINVAL;



	cmd_enc->pp_timeout_report_cnt++;
@@ -247,11 +237,6 @@ static int _dpu_encoder_phys_cmd_wait_for_idle( 
	struct dpu_encoder_wait_info wait_info;

	int ret;



	if (!phys_enc) {

		DPU_ERROR("invalid encoder\n");

		return -EINVAL;

	}



	wait_info.wq = &phys_enc->pending_kickoff_wq;

	wait_info.atomic_cnt = &phys_enc->pending_kickoff_cnt;

	wait_info.timeout_ms = KICKOFF_TIMEOUT_MS;
@@ -273,7 +258,7 @@ static int dpu_encoder_phys_cmd_control_vblank_irq( 
	int ret = 0;

	int refcount;



	if (!phys_enc || !phys_enc->hw_pp) {

	if (!phys_enc->hw_pp) {

		DPU_ERROR("invalid encoder\n");

		return -EINVAL;

	}
@@ -314,9 +299,6 @@ end: 
static void dpu_encoder_phys_cmd_irq_control(struct dpu_encoder_phys *phys_enc,

		bool enable)

{

	if (!phys_enc)

		return;



	trace_dpu_enc_phys_cmd_irq_ctrl(DRMID(phys_enc->parent),

			phys_enc->hw_pp->idx - PINGPONG_0,

			enable, atomic_read(&phys_enc->vblank_refcount));
@@ -351,7 +333,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config( 
	u32 vsync_hz;

	struct dpu_kms *dpu_kms;



	if (!phys_enc || !phys_enc->hw_pp) {

	if (!phys_enc->hw_pp) {

		DPU_ERROR("invalid encoder\n");

		return;

	}
@@ -428,8 +410,7 @@ static void _dpu_encoder_phys_cmd_pingpong_config( 
	struct dpu_encoder_phys_cmd *cmd_enc =

		to_dpu_encoder_phys_cmd(phys_enc);



	if (!phys_enc || !phys_enc->hw_pp

			|| !phys_enc->hw_ctl->ops.setup_intf_cfg) {

	if (!phys_enc->hw_pp || !phys_enc->hw_ctl->ops.setup_intf_cfg) {

		DPU_ERROR("invalid arg(s), enc %d\n", phys_enc != 0);

		return;

	}
@@ -458,7 +439,7 @@ static void dpu_encoder_phys_cmd_enable_helper( 
	struct dpu_hw_ctl *ctl;

	u32 flush_mask = 0;



	if (!phys_enc || !phys_enc->hw_pp) {

	if (!phys_enc->hw_pp) {

		DPU_ERROR("invalid arg(s), encoder %d\n", phys_enc != 0);

		return;

	}
@@ -480,7 +461,7 @@ static void dpu_encoder_phys_cmd_enable(struct dpu_encoder_phys *phys_enc) 
	struct dpu_encoder_phys_cmd *cmd_enc =

		to_dpu_encoder_phys_cmd(phys_enc);



	if (!phys_enc || !phys_enc->hw_pp) {

	if (!phys_enc->hw_pp) {

		DPU_ERROR("invalid phys encoder\n");

		return;

	}
@@ -499,8 +480,7 @@ static void dpu_encoder_phys_cmd_enable(struct dpu_encoder_phys *phys_enc) 
static void _dpu_encoder_phys_cmd_connect_te(

		struct dpu_encoder_phys *phys_enc, bool enable)

{

	if (!phys_enc || !phys_enc->hw_pp ||

			!phys_enc->hw_pp->ops.connect_external_te)

	if (!phys_enc->hw_pp || !phys_enc->hw_pp->ops.connect_external_te)

		return;



	trace_dpu_enc_phys_cmd_connect_te(DRMID(phys_enc->parent), enable);
@@ -518,7 +498,7 @@ static int dpu_encoder_phys_cmd_get_line_count( 
{

	struct dpu_hw_pingpong *hw_pp;



	if (!phys_enc || !phys_enc->hw_pp)

	if (!phys_enc->hw_pp)

		return -EINVAL;



	if (!dpu_encoder_phys_cmd_is_master(phys_enc))
@@ -536,7 +516,7 @@ static void dpu_encoder_phys_cmd_disable(struct dpu_encoder_phys *phys_enc) 
	struct dpu_encoder_phys_cmd *cmd_enc =

		to_dpu_encoder_phys_cmd(phys_enc);



	if (!phys_enc || !phys_enc->hw_pp) {

	if (!phys_enc->hw_pp) {

		DPU_ERROR("invalid encoder\n");

		return;

	}
@@ -559,10 +539,6 @@ static void dpu_encoder_phys_cmd_destroy(struct dpu_encoder_phys *phys_enc) 
	struct dpu_encoder_phys_cmd *cmd_enc =

		to_dpu_encoder_phys_cmd(phys_enc);



	if (!phys_enc) {

		DPU_ERROR("invalid encoder\n");

		return;

	}

	kfree(cmd_enc);

}
@@ -580,7 +556,7 @@ static void dpu_encoder_phys_cmd_prepare_for_kickoff( 
			to_dpu_encoder_phys_cmd(phys_enc);

	int ret;



	if (!phys_enc || !phys_enc->hw_pp) {

	if (!phys_enc->hw_pp) {

		DPU_ERROR("invalid encoder\n");

		return;

	}
@@ -614,11 +590,6 @@ static int _dpu_encoder_phys_cmd_wait_for_ctl_start( 
	struct dpu_encoder_wait_info wait_info;

	int ret;



	if (!phys_enc) {

		DPU_ERROR("invalid argument(s)\n");

		return -EINVAL;

	}



	wait_info.wq = &phys_enc->pending_kickoff_wq;

	wait_info.atomic_cnt = &phys_enc->pending_ctlstart_cnt;

	wait_info.timeout_ms = KICKOFF_TIMEOUT_MS;
@@ -639,9 +610,6 @@ static int dpu_encoder_phys_cmd_wait_for_tx_complete( 
{

	int rc;



	if (!phys_enc)

		return -EINVAL;



	rc = _dpu_encoder_phys_cmd_wait_for_idle(phys_enc);

	if (rc) {

		DRM_ERROR("failed wait_for_idle: id:%u ret:%d intf:%d\n",
@@ -658,9 +626,6 @@ static int dpu_encoder_phys_cmd_wait_for_commit_done( 
	int rc = 0;

	struct dpu_encoder_phys_cmd *cmd_enc;



	if (!phys_enc)

		return -EINVAL;



	cmd_enc = to_dpu_encoder_phys_cmd(phys_enc);



	/* only required for master controller */
@@ -681,9 +646,6 @@ static int dpu_encoder_phys_cmd_wait_for_vblank( 
	struct dpu_encoder_phys_cmd *cmd_enc;

	struct dpu_encoder_wait_info wait_info;



	if (!phys_enc)

		return -EINVAL;



	cmd_enc = to_dpu_encoder_phys_cmd(phys_enc);



	/* only required for master controller */
@@ -715,9 +677,6 @@ static void dpu_encoder_phys_cmd_handle_post_kickoff( 
static void dpu_encoder_phys_cmd_trigger_start(

		struct dpu_encoder_phys *phys_enc)

{

	if (!phys_enc)

		return;



	dpu_encoder_helper_trigger_start(phys_enc);

}

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

+3 −41
Original line number Diff line number Diff line
@@ -220,7 +220,6 @@ static bool dpu_encoder_phys_vid_mode_fixup( 
		const struct drm_display_mode *mode,

		struct drm_display_mode *adj_mode)

{

	if (phys_enc)

	DPU_DEBUG_VIDENC(phys_enc, "\n");



	/*
@@ -239,7 +238,7 @@ static void dpu_encoder_phys_vid_setup_timing_engine( 
	unsigned long lock_flags;

	struct dpu_hw_intf_cfg intf_cfg = { 0 };



	if (!phys_enc || !phys_enc->hw_ctl->ops.setup_intf_cfg) {

	if (!phys_enc->hw_ctl->ops.setup_intf_cfg) {

		DPU_ERROR("invalid encoder %d\n", phys_enc != 0);

		return;

	}
@@ -301,9 +300,6 @@ static void dpu_encoder_phys_vid_vblank_irq(void *arg, int irq_idx) 
	u32 flush_register = 0;

	int new_cnt = -1, old_cnt = -1;



	if (!phys_enc)

		return;



	hw_ctl = phys_enc->hw_ctl;



	DPU_ATRACE_BEGIN("vblank_irq");
@@ -341,9 +337,6 @@ static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx) 
{

	struct dpu_encoder_phys *phys_enc = arg;



	if (!phys_enc)

		return;



	if (phys_enc->parent_ops->handle_underrun_virt)

		phys_enc->parent_ops->handle_underrun_virt(phys_enc->parent,

			phys_enc);
@@ -380,11 +373,6 @@ static void dpu_encoder_phys_vid_mode_set( 
		struct drm_display_mode *mode,

		struct drm_display_mode *adj_mode)

{

	if (!phys_enc) {

		DPU_ERROR("invalid encoder/kms\n");

		return;

	}



	if (adj_mode) {

		phys_enc->cached_mode = *adj_mode;

		drm_mode_debug_printmodeline(adj_mode);
@@ -401,11 +389,6 @@ static int dpu_encoder_phys_vid_control_vblank_irq( 
	int ret = 0;

	int refcount;



	if (!phys_enc) {

		DPU_ERROR("invalid encoder\n");

		return -EINVAL;

	}



	refcount = atomic_read(&phys_enc->vblank_refcount);



	/* Slave encoders don't report vblank */
@@ -486,11 +469,6 @@ skip_flush: 


static void dpu_encoder_phys_vid_destroy(struct dpu_encoder_phys *phys_enc)

{

	if (!phys_enc) {

		DPU_ERROR("invalid encoder\n");

		return;

	}



	DPU_DEBUG_VIDENC(phys_enc, "\n");

	kfree(phys_enc);

}
@@ -508,11 +486,6 @@ static int dpu_encoder_phys_vid_wait_for_vblank( 
	struct dpu_encoder_wait_info wait_info;

	int ret;



	if (!phys_enc) {

		pr_err("invalid encoder\n");

		return -EINVAL;

	}



	wait_info.wq = &phys_enc->pending_kickoff_wq;

	wait_info.atomic_cnt = &phys_enc->pending_kickoff_cnt;

	wait_info.timeout_ms = KICKOFF_TIMEOUT_MS;
@@ -558,11 +531,6 @@ static void dpu_encoder_phys_vid_prepare_for_kickoff( 
	struct dpu_hw_ctl *ctl;

	int rc;



	if (!phys_enc) {

		DPU_ERROR("invalid encoder/parameters\n");

		return;

	}



	ctl = phys_enc->hw_ctl;

	if (!ctl->ops.wait_reset_status)

		return;
@@ -584,7 +552,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc) 
	unsigned long lock_flags;

	int ret;



	if (!phys_enc || !phys_enc->parent || !phys_enc->parent->dev) {

	if (!phys_enc->parent || !phys_enc->parent->dev) {

		DPU_ERROR("invalid encoder/device\n");

		return;

	}
@@ -654,9 +622,6 @@ static void dpu_encoder_phys_vid_irq_control(struct dpu_encoder_phys *phys_enc, 
{

	int ret;



	if (!phys_enc)

		return;



	trace_dpu_enc_phys_vid_irq_ctrl(DRMID(phys_enc->parent),

			    phys_enc->hw_intf->idx - INTF_0,

			    enable,
@@ -677,9 +642,6 @@ static void dpu_encoder_phys_vid_irq_control(struct dpu_encoder_phys *phys_enc, 
static int dpu_encoder_phys_vid_get_line_count(

		struct dpu_encoder_phys *phys_enc)

{

	if (!phys_enc)

		return -EINVAL;



	if (!dpu_encoder_phys_vid_is_master(phys_enc))

		return -EINVAL;

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