Commit 5d3c3c7d authored Jul 15, 2015 by James Hogan Committed by Ralf Baechle Sep 03, 2015

MIPS: dump_tlb: Only dump PageGrain if interesting



The PageGrain register may not exist if certain architectural features
aren't present, therefore only print out its value when dumping the TLB
registers if it is expected to contain fields relevant to the TLB.

Fixes: d1e9a4f5 ("MIPS: Add SysRq operation to dump TLBs on all CPUs")
Reported-by: Joshua Kinard <kumba@gentoo.org>
Reported-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10723/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent aaa7be48

arch/mips/lib/dump_tlb.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -23,6 +23,7 @@ void dump_tlb_regs(void)
		pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());
		pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());
		pr_info("Wired : %0x\n", read_c0_wired());
		if (cpu_has_small_pages \|\| cpu_has_rixi \|\| cpu_has_xpa)
		pr_info("PageGrain: %0x\n", read_c0_pagegrain());
		if (cpu_has_htw) {
		pr_info("PWField : %0*lx\n", field, read_c0_pwfield());

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