Commit 5d1ef2b4 authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Chris Wilson
Browse files

drm/i915/uc: Inject probe errors into intel_uc_init_hw 



Inject probe errors into intel_uc_init_hw to make sure we
correctly handle any uC initialization failure.

To avoid complains from CI about injected errors use
i915_probe_error to lower message level.

v4: rebased after moving hot fixes moved to separate patches

Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> #v1
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190802184055.31988-6-michal.wajdeczko@intel.com
parent 32ff76e8

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

+4 −0
Original line number Diff line number Diff line
@@ -1123,6 +1123,10 @@ int intel_guc_submission_enable(struct intel_guc *guc) 
	enum intel_engine_id id;

	int err;



	err = i915_inject_load_error(gt->i915, -ENXIO);

	if (err)

		return err;



	/*

	 * We're using GuC work items for submitting work through GuC. Since

	 * we're coalescing multiple requests from a single context into a

drivers/gpu/drm/i915/gt/uc/intel_huc.c

+5 −3
Original line number Diff line number Diff line
@@ -139,6 +139,10 @@ int intel_huc_auth(struct intel_huc *huc) 
	GEM_BUG_ON(!intel_uc_fw_is_loaded(&huc->fw));

	GEM_BUG_ON(intel_huc_is_authenticated(huc));



	ret = i915_inject_load_error(gt->i915, -ENXIO);

	if (ret)

		goto fail;



	ret = intel_guc_auth_huc(guc,

				 intel_guc_ggtt_offset(guc, huc->rsa_data));

	if (ret) {
@@ -158,13 +162,11 @@ int intel_huc_auth(struct intel_huc *huc) 
	}



	huc->fw.status = INTEL_UC_FIRMWARE_RUNNING;



	return 0;



fail:

	i915_probe_error(gt->i915, "HuC: Authentication failed %d\n", ret);

	huc->fw.status = INTEL_UC_FIRMWARE_FAIL;



	DRM_ERROR("HuC: Authentication failed %d\n", ret);

	return ret;

}

drivers/gpu/drm/i915/gt/uc/intel_uc.c

+13 −1
Original line number Diff line number Diff line
@@ -39,6 +39,10 @@ static int __intel_uc_reset_hw(struct intel_uc *uc) 
	int ret;

	u32 guc_status;



	ret = i915_inject_load_error(gt->i915, -ENXIO);

	if (ret)

		return ret;



	ret = intel_reset_guc(gt);

	if (ret) {

		DRM_ERROR("Failed to reset GuC, ret = %d\n", ret);
@@ -205,6 +209,10 @@ static int guc_enable_communication(struct intel_guc *guc) 


	GEM_BUG_ON(guc_communication_enabled(guc));



	ret = i915_inject_load_error(i915, -ENXIO);

	if (ret)

		return ret;



	ret = intel_guc_ct_enable(&guc->ct);

	if (ret)

		return ret;
@@ -376,6 +384,10 @@ static int uc_init_wopcm(struct intel_uc *uc) 
	GEM_BUG_ON(!(size & GUC_WOPCM_SIZE_MASK));

	GEM_BUG_ON(size & ~GUC_WOPCM_SIZE_MASK);



	err = i915_inject_load_error(gt->i915, -ENXIO);

	if (err)

		return err;



	mask = GUC_WOPCM_SIZE_MASK | GUC_WOPCM_SIZE_LOCKED;

	err = intel_uncore_write_and_verify(uncore, GUC_WOPCM_SIZE, size, mask,

					    size | GUC_WOPCM_SIZE_LOCKED);
@@ -502,7 +514,7 @@ err_out: 
	if (GEM_WARN_ON(ret == -EIO))

		ret = -EINVAL;



	dev_err(i915->drm.dev, "GuC initialization failed %d\n", ret);

	i915_probe_error(i915, "GuC initialization failed %d\n", ret);

	return ret;

}

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

+12 −6
Original line number Diff line number Diff line
@@ -383,6 +383,10 @@ static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt, 
	u64 offset;

	int ret;



	ret = i915_inject_load_error(gt->i915, -ETIMEDOUT);

	if (ret)

		return ret;



	intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);



	/* Set the source address for the uCode */
@@ -443,8 +447,13 @@ int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt, 
	/* make sure the status was cleared the last time we reset the uc */

	GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw));



	err = i915_inject_load_error(gt->i915, -ENOEXEC);

	if (err)

		return err;



	if (!intel_uc_fw_is_available(uc_fw))

		return -ENOEXEC;



	/* Call custom loader */

	intel_uc_fw_ggtt_bind(uc_fw, gt);

	err = uc_fw_xfer(uc_fw, gt, wopcm_offset, dma_flags);
@@ -464,13 +473,10 @@ int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt, 
	return 0;



fail:

	i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n",

			 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,

			 err);

	uc_fw->status = INTEL_UC_FIRMWARE_FAIL;

	DRM_DEBUG_DRIVER("%s fw load failed\n",

			 intel_uc_fw_type_repr(uc_fw->type));



	DRM_WARN("%s: Failed to load firmware %s (error %d)\n",

		 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, err);



	return err;

}

drivers/gpu/drm/i915/i915_gem.c

+1 −1
Original line number Diff line number Diff line
@@ -1243,7 +1243,7 @@ int i915_gem_init_hw(struct drm_i915_private *i915) 
	/* We can't enable contexts until all firmware is loaded */

	ret = intel_uc_init_hw(&gt->uc);

	if (ret) {

		DRM_ERROR("Enabling uc failed (%d)\n", ret);

		i915_probe_error(i915, "Enabling uc failed (%d)\n", ret);

		goto out;

	}

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