drm/amdgpu: Move existing pflip fields into separate struct (5d1c59c4) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

+3 −1

Original line number	Diff line number	Diff line
		@@ -46,6 +46,7 @@

		#include <drm/drm_dp_mst_helper.h>
		#include "modules/inc/mod_freesync.h"
		#include "amdgpu_dm_irq_params.h"

		struct amdgpu_bo;
		struct amdgpu_device;
		@@ -404,7 +405,8 @@ struct amdgpu_crtc {
		struct amdgpu_flip_work *pflip_works;
		enum amdgpu_flip_status pflip_status;
		int deferred_flip_completion;
		u32 last_flip_vblank;
		/* parameters access from DM IRQ handler */
		struct dm_irq_params dm_irq_params;
		/* pll sharing */
		struct amdgpu_atom_ss ss;
		bool ss_enabled;

+2 −2

Original line number	Diff line number	Diff line
		@@ -425,7 +425,7 @@ static void dm_pflip_high_irq(void *interrupt_params)
		* of pageflip completion, so last_flip_vblank is the forbidden count
		* for queueing new pageflips if vsync + VRR is enabled.
		*/
		amdgpu_crtc->last_flip_vblank =
		amdgpu_crtc->dm_irq_params.last_flip_vblank =
		amdgpu_get_vblank_counter_kms(&amdgpu_crtc->base);

		amdgpu_crtc->pflip_status = AMDGPU_FLIP_NONE;
		@@ -7197,7 +7197,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
		* on late submission of flips.
		*/
		spin_lock_irqsave(&pcrtc->dev->event_lock, flags);
		last_flip_vblank = acrtc_attach->last_flip_vblank;
		last_flip_vblank = acrtc_attach->dm_irq_params.last_flip_vblank;
		spin_unlock_irqrestore(&pcrtc->dev->event_lock, flags);
		}

0 → 100644

+33 −0

Original line number	Diff line number	Diff line
		/*
		* Copyright 2020 Advanced Micro Devices, Inc.
		*
		* Permission is hereby granted, free of charge, to any person obtaining a
		* copy of this software and associated documentation files (the "Software"),
		* to deal in the Software without restriction, including without limitation
		* the rights to use, copy, modify, merge, publish, distribute, sublicense,
		* and/or sell copies of the Software, and to permit persons to whom the
		* Software is furnished to do so, subject to the following conditions:
		*
		* The above copyright notice and this permission notice shall be included in
		* all copies or substantial portions of the Software.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
		* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
		* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
		* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
		* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
		* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		* OTHER DEALINGS IN THE SOFTWARE.
		*
		* Authors: AMD
		*
		*/

		#ifndef __AMDGPU_DM_IRQ_PARAMS_H__
		#define __AMDGPU_DM_IRQ_PARAMS_H__

		struct dm_irq_params {
		u32 last_flip_vblank;
		};

		#endif /* __AMDGPU_DM_IRQ_PARAMS_H__ */