Commit 5cfb19ac authored by Manjunath Hadli's avatar Manjunath Hadli Committed by Sekhar Nori
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ARM: davinci: streamline sysmod access 



There are instances of IO_ADDRESS() being used for system module
(sysmod) register access. Eliminate this in favor of a ioremap()
based access. ioremap() the entire sysmod address space once during
boot-up and provide a helper macro to access specific register
offsets within the address space.

With this, also eliminate ioremap() of specific sysmodule registers
related to VPIF happening in DM646x EVM code.

While at it, also eliminate some duplicate sysmod register offset macros
defined in code and place offset definitions at one place in davinci.h

Signed-off-by: default avatarManjunath Hadli <manjunath.hadli@ti.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
[nsekhar@ti.com: removed the addition of ifndef __ASSEMBLER__
in davinci.h, eliminate IO_ADDRESS() usage left out in dm646x.c,
cleanup VPIF sysmodule register access as part of this patch and
keep all sysmod offsets in davinci.h Also, convert the WARN_ON()
on failure to setup sysmod base to BUG_ON()]
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
parent 39c6d2d1

arch/arm/mach-davinci/board-dm646x-evm.c

+10 −20
Original line number Diff line number Diff line
@@ -410,8 +410,6 @@ static struct davinci_i2c_platform_data i2c_pdata = { 
	.bus_delay      = 0 /* usec */,

};



#define VIDCLKCTL_OFFSET	(DAVINCI_SYSTEM_MODULE_BASE + 0x38)

#define VSCLKDIS_OFFSET		(DAVINCI_SYSTEM_MODULE_BASE + 0x6c)

#define VCH2CLK_MASK		(BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))

#define VCH2CLK_SYSCLK8		(BIT(9))

#define VCH2CLK_AUXCLK		(BIT(9) | BIT(8))
@@ -429,8 +427,6 @@ static struct davinci_i2c_platform_data i2c_pdata = { 
#define TVP5147_CH0		"tvp514x-0"

#define TVP5147_CH1		"tvp514x-1"



static void __iomem *vpif_vidclkctl_reg;

static void __iomem *vpif_vsclkdis_reg;

/* spin lock for updating above registers */

static spinlock_t vpif_reg_lock;
@@ -441,14 +437,14 @@ static int set_vpif_clock(int mux_mode, int hd) 
	int val = 0;

	int err = 0;



	if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)

	if (!cpld_client)

		return -ENXIO;



	/* disable the clock */

	spin_lock_irqsave(&vpif_reg_lock, flags);

	value = __raw_readl(vpif_vsclkdis_reg);

	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));

	value |= (VIDCH3CLK | VIDCH2CLK);

	__raw_writel(value, vpif_vsclkdis_reg);

	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));

	spin_unlock_irqrestore(&vpif_reg_lock, flags);



	val = i2c_smbus_read_byte(cpld_client);
@@ -464,7 +460,7 @@ static int set_vpif_clock(int mux_mode, int hd) 
	if (err)

		return err;



	value = __raw_readl(vpif_vidclkctl_reg);

	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));

	value &= ~(VCH2CLK_MASK);

	value &= ~(VCH3CLK_MASK);
@@ -473,13 +469,13 @@ static int set_vpif_clock(int mux_mode, int hd) 
	else

		value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);



	__raw_writel(value, vpif_vidclkctl_reg);

	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));



	spin_lock_irqsave(&vpif_reg_lock, flags);

	value = __raw_readl(vpif_vsclkdis_reg);

	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));

	/* enable the clock */

	value &= ~(VIDCH3CLK | VIDCH2CLK);

	__raw_writel(value, vpif_vsclkdis_reg);

	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));

	spin_unlock_irqrestore(&vpif_reg_lock, flags);



	return 0;
@@ -564,7 +560,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) 
	int val;

	u32 value;



	if (!vpif_vidclkctl_reg || !cpld_client)

	if (!cpld_client)

		return -ENXIO;



	val = i2c_smbus_read_byte(cpld_client);
@@ -572,7 +568,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) 
		return val;



	spin_lock_irqsave(&vpif_reg_lock, flags);

	value = __raw_readl(vpif_vidclkctl_reg);

	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));

	if (mux_mode) {

		val &= VPIF_INPUT_TWO_CHANNEL;

		value |= VIDCH1CLK;
@@ -580,7 +576,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) 
		val |= VPIF_INPUT_ONE_CHANNEL;

		value &= ~VIDCH1CLK;

	}

	__raw_writel(value, vpif_vidclkctl_reg);

	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));

	spin_unlock_irqrestore(&vpif_reg_lock, flags);



	err = i2c_smbus_write_byte(cpld_client, val);
@@ -674,12 +670,6 @@ static struct vpif_capture_config dm646x_vpif_capture_cfg = { 


static void __init evm_init_video(void)

{

	vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);

	vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);

	if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {

		pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");

		return;

	}

	spin_lock_init(&vpif_reg_lock);



	dm646x_setup_vpif(&dm646x_vpif_display_config,

arch/arm/mach-davinci/davinci.h

+11 −0
Original line number Diff line number Diff line
@@ -25,10 +25,21 @@ 


#include <mach/asp.h>

#include <mach/keyscan.h>

#include <mach/hardware.h>



#include <media/davinci/vpfe_capture.h>

#include <media/davinci/vpif_types.h>



#define DAVINCI_SYSTEM_MODULE_BASE	0x01c40000

#define SYSMOD_VIDCLKCTL		0x38

#define SYSMOD_VDD3P3VPWDN		0x48

#define SYSMOD_VSCLKDIS			0x6c

#define SYSMOD_PUPDCTL1			0x7c



extern void __iomem *davinci_sysmod_base;

#define DAVINCI_SYSMOD_VIRT(x)	(davinci_sysmod_base + (x))

void davinci_map_sysmod(void);



/* DM355 base addresses */

#define DM355_ASYNC_EMIF_CONTROL_BASE	0x01e10000

#define DM355_ASYNC_EMIF_DATA_CE0_BASE	0x02000000

arch/arm/mach-davinci/devices.c

+21 −11
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <mach/mmc.h>

#include <mach/time.h>



#include "davinci.h"

#include "clock.h"



#define DAVINCI_I2C_BASE	     0x01C21000
@@ -33,8 +34,19 @@ 
#define DM365_MMCSD0_BASE	     0x01D11000

#define DM365_MMCSD1_BASE	     0x01D00000



/* System control register offsets */

#define DM64XX_VDD3P3V_PWDN	0x48

void __iomem  *davinci_sysmod_base;



void davinci_map_sysmod(void)

{

	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,

					      0x800);

	/*

	 * Throw a bug since a lot of board initialization code depends

	 * on system module availability. ioremap() failing this early

	 * need careful looking into anyway.

	 */

	BUG_ON(!davinci_sysmod_base);

}



static struct resource i2c_resources[] = {

	{
@@ -212,12 +224,12 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) 
			davinci_cfg_reg(DM355_SD1_DATA2);

			davinci_cfg_reg(DM355_SD1_DATA3);

		} else if (cpu_is_davinci_dm365()) {

			void __iomem *pupdctl1 =

				IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);



			/* Configure pull down control */

			__raw_writel((__raw_readl(pupdctl1) & ~0xfc0),

					pupdctl1);

			unsigned v;



			v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));

			__raw_writel(v & ~0xfc0,

					DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));



			mmcsd1_resources[0].start = DM365_MMCSD1_BASE;

			mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
@@ -246,11 +258,9 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) 
			mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;

		} else if (cpu_is_davinci_dm644x()) {

			/* REVISIT: should this be in board-init code? */

			void __iomem *base =

				IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);



			/* Power-on 3.3V IO cells */

			__raw_writel(0, base + DM64XX_VDD3P3V_PWDN);

			__raw_writel(0,

				DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));

			/*Set up the pull regiter for MMC */

			davinci_cfg_reg(DM644X_MSTK);

		}

arch/arm/mach-davinci/dm355.c

+1 −0
Original line number Diff line number Diff line
@@ -871,6 +871,7 @@ void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) 
void __init dm355_init(void)

{

	davinci_common_init(&davinci_soc_info_dm355);

	davinci_map_sysmod();

}



static int __init dm355_init_devices(void)

arch/arm/mach-davinci/dm365.c

+1 −0
Original line number Diff line number Diff line
@@ -1138,6 +1138,7 @@ void __init dm365_init_rtc(void) 
void __init dm365_init(void)

{

	davinci_common_init(&davinci_soc_info_dm365);

	davinci_map_sysmod();

}



static struct resource dm365_vpss_resources[] = {

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