Commit 5cde2653 authored by Stephane Eranian's avatar Stephane Eranian Committed by Ingo Molnar
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perf/x86/rapl: Add AMD Fam17h RAPL support 



This patch enables AMD Fam17h RAPL support for the Package level metric.
The support is as per AMD Fam17h Model31h (Zen2) and model 00-ffh (Zen1) PPR.

The same output is available via the energy-pkg pseudo event:

  $ perf stat -a -I 1000 --per-socket -e power/energy-pkg/

Signed-off-by: default avatarStephane Eranian <eranian@google.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200527224659.206129-6-eranian@google.com
parent 4c953f87

arch/x86/events/rapl.c

+18 −0
Original line number Diff line number Diff line
@@ -537,6 +537,16 @@ static struct perf_msr intel_rapl_msrs[] = { 
	[PERF_RAPL_PSYS] = { MSR_PLATFORM_ENERGY_STATUS, &rapl_events_psys_group,  test_msr },

};



/*

 * Force to PERF_RAPL_MAX size due to:

 * - perf_msr_probe(PERF_RAPL_MAX)

 * - want to use same event codes across both architectures

 */

static struct perf_msr amd_rapl_msrs[PERF_RAPL_MAX] = {

	[PERF_RAPL_PKG]  = { MSR_AMD_PKG_ENERGY_STATUS,  &rapl_events_pkg_group,   test_msr },

};





static int rapl_cpu_offline(unsigned int cpu)

{

	struct rapl_pmu *pmu = cpu_to_rapl_pmu(cpu);
@@ -740,6 +750,13 @@ static struct rapl_model model_skl = { 
	.rapl_msrs      = intel_rapl_msrs,

};



static struct rapl_model model_amd_fam17h = {

	.events		= BIT(PERF_RAPL_PKG),

	.apply_quirk	= false,

	.msr_power_unit = MSR_AMD_RAPL_POWER_UNIT,

	.rapl_msrs      = amd_rapl_msrs,

};



static const struct x86_cpu_id rapl_model_match[] __initconst = {

	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE,		&model_snb),

	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X,	&model_snbep),
@@ -770,6 +787,7 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = { 
	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&model_hsx),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L,		&model_skl),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE,		&model_skl),

	X86_MATCH_VENDOR_FAM(AMD, 0x17, &model_amd_fam17h),

	{},

};

MODULE_DEVICE_TABLE(x86cpu, rapl_model_match);

arch/x86/include/asm/msr-index.h

+3 −0
Original line number Diff line number Diff line
@@ -301,6 +301,9 @@ 
#define MSR_PP1_ENERGY_STATUS		0x00000641

#define MSR_PP1_POLICY			0x00000642



#define MSR_AMD_PKG_ENERGY_STATUS	0xc001029b

#define MSR_AMD_RAPL_POWER_UNIT		0xc0010299



/* Config TDP MSRs */

#define MSR_CONFIG_TDP_NOMINAL		0x00000648

#define MSR_CONFIG_TDP_LEVEL_1		0x00000649

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