Commit 5cd66239 authored by Lars-Peter Clausen's avatar Lars-Peter Clausen Committed by Jonathan Cameron
Browse files

iio: frequency: ad9523: Fix typo in ad9523_platform_data 



Replace diff_{m1,m2} with div_{m1,m2} since they are dividers and not a
differential settings.

Signed-off-by: default avatarLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: default avatarAlexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 89c16919

drivers/iio/frequency/ad9523.c

+8 −8
Original line number Diff line number Diff line
@@ -872,22 +872,22 @@ static int ad9523_setup(struct iio_dev *indio_dev) 
		return ret;



	ret = ad9523_write(indio_dev, AD9523_PLL2_VCO_DIVIDER,

		AD9523_PLL2_VCO_DIV_M1(pdata->pll2_vco_diff_m1) |

		AD9523_PLL2_VCO_DIV_M2(pdata->pll2_vco_diff_m2) |

		AD_IFE(pll2_vco_diff_m1, 0,

		AD9523_PLL2_VCO_DIV_M1(pdata->pll2_vco_div_m1) |

		AD9523_PLL2_VCO_DIV_M2(pdata->pll2_vco_div_m2) |

		AD_IFE(pll2_vco_div_m1, 0,

		       AD9523_PLL2_VCO_DIV_M1_PWR_DOWN_EN) |

		AD_IFE(pll2_vco_diff_m2, 0,

		AD_IFE(pll2_vco_div_m2, 0,

		       AD9523_PLL2_VCO_DIV_M2_PWR_DOWN_EN));

	if (ret < 0)

		return ret;



	if (pdata->pll2_vco_diff_m1)

	if (pdata->pll2_vco_div_m1)

		st->vco_out_freq[AD9523_VCO1] =

			st->vco_freq / pdata->pll2_vco_diff_m1;

			st->vco_freq / pdata->pll2_vco_div_m1;



	if (pdata->pll2_vco_diff_m2)

	if (pdata->pll2_vco_div_m2)

		st->vco_out_freq[AD9523_VCO2] =

			st->vco_freq / pdata->pll2_vco_diff_m2;

			st->vco_freq / pdata->pll2_vco_div_m2;



	st->vco_out_freq[AD9523_VCXO] = pdata->vcxo_freq;

include/linux/iio/frequency/ad9523.h

+4 −4
Original line number Diff line number Diff line
@@ -129,8 +129,8 @@ enum cpole1_capacitor { 
 * @pll2_ndiv_b_cnt: PLL2 Feedback N-divider, B Counter, range 0..63.

 * @pll2_freq_doubler_en: PLL2 frequency doubler enable.

 * @pll2_r2_div: PLL2 R2 divider, range 0..31.

 * @pll2_vco_diff_m1: VCO1 divider, range 3..5.

 * @pll2_vco_diff_m2: VCO2 divider, range 3..5.

 * @pll2_vco_div_m1: VCO1 divider, range 3..5.

 * @pll2_vco_div_m2: VCO2 divider, range 3..5.

 * @rpole2: PLL2 loop filter Rpole resistor value.

 * @rzero: PLL2 loop filter Rzero resistor value.

 * @cpole1: PLL2 loop filter Cpole capacitor value.
@@ -176,8 +176,8 @@ struct ad9523_platform_data { 
	unsigned char			pll2_ndiv_b_cnt;

	bool				pll2_freq_doubler_en;

	unsigned char			pll2_r2_div;

	unsigned char			pll2_vco_diff_m1; /* 3..5 */

	unsigned char			pll2_vco_diff_m2; /* 3..5 */

	unsigned char			pll2_vco_div_m1; /* 3..5 */

	unsigned char			pll2_vco_div_m2; /* 3..5 */



	/* Loop Filter PLL2 */

	enum rpole2_resistor		rpole2;

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