Commit 5cccf379 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab Committed by Paolo Bonzini
Browse files

docs: kvm: convert devices/xics.txt to ReST 



- Use title markups;
- adjust indentation and add blank lines as needed;
- adjust tables to match ReST accepted formats;
- use :field: markups.

Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 6c972ba6

Documentation/virt/kvm/devices/index.rst

+1 −0
Original line number Diff line number Diff line
@@ -15,3 +15,4 @@ Devices 
   vcpu

   vfio

   vm

   xics

Documentation/virt/kvm/devices/xics.txt→Documentation/virt/kvm/devices/xics.rst

+22 −6
Original line number Diff line number Diff line 
.. SPDX-License-Identifier: GPL-2.0



=========================

XICS interrupt controller

=========================



Device type supported: KVM_DEV_TYPE_XICS



Groups:

  1. KVM_DEV_XICS_GRP_SOURCES

  Attributes: One per interrupt source, indexed by the source number.

       Attributes:



         One per interrupt source, indexed by the source number.

  2. KVM_DEV_XICS_GRP_CTRL

       Attributes:



         2.1 KVM_DEV_XICS_NR_SERVERS (write only)



  The kvm_device_attr.addr points to a __u32 value which is the number of

  interrupt server numbers (ie, highest possible vcpu id plus one).



  Errors:

    -EINVAL: Value greater than KVM_MAX_VCPU_ID.

    -EFAULT: Invalid user pointer for attr->addr.

    -EBUSY:  A vcpu is already connected to the device.



    =======  ==========================================

    -EINVAL  Value greater than KVM_MAX_VCPU_ID.

    -EFAULT  Invalid user pointer for attr->addr.

    -EBUSY   A vcpu is already connected to the device.

    =======  ==========================================



This device emulates the XICS (eXternal Interrupt Controller

Specification) defined in PAPR.  The XICS has a set of interrupt
@@ -53,24 +64,29 @@ the interrupt source number. The 64 bit state word has the following 
bitfields, starting from the least-significant end of the word:



* Destination (server number), 32 bits



  This specifies where the interrupt should be sent, and is the

  interrupt server number specified for the destination vcpu.



* Priority, 8 bits



  This is the priority specified for this interrupt source, where 0 is

  the highest priority and 255 is the lowest.  An interrupt with a

  priority of 255 will never be delivered.



* Level sensitive flag, 1 bit



  This bit is 1 for a level-sensitive interrupt source, or 0 for

  edge-sensitive (or MSI).



* Masked flag, 1 bit



  This bit is set to 1 if the interrupt is masked (cannot be delivered

  regardless of its priority), for example by the ibm,int-off RTAS

  call, or 0 if it is not masked.



* Pending flag, 1 bit



  This bit is 1 if the source has a pending interrupt, otherwise 0.



Only one XICS instance may be created per VM.

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