Commit 5cc4aafc authored by James Hogan's avatar James Hogan Committed by Paolo Bonzini
Browse files

MIPS: KVM: Recognise r6 CACHE encoding 



Recognise the new MIPSr6 CACHE instruction encoding rather than the
pre-r6 one when an r6 kernel is being built. A SPECIAL3 opcode is used
and the immediate field is reduced to 9 bits wide since MIPSr6.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim KrÄmář <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 2e0badfa

arch/mips/kvm/dyntrans.c

+4 −1
Original line number Diff line number Diff line
@@ -72,6 +72,9 @@ int kvm_mips_trans_cache_va(union mips_instruction inst, u32 *opc, 
	synci_inst.i_format.opcode = bcond_op;

	synci_inst.i_format.rs = inst.i_format.rs;

	synci_inst.i_format.rt = synci_op;

	if (cpu_has_mips_r6)

		synci_inst.i_format.simmediate = inst.spec3_format.simmediate;

	else

		synci_inst.i_format.simmediate = inst.i_format.simmediate;



	return kvm_mips_trans_replace(vcpu, opc, synci_inst);

arch/mips/kvm/emulate.c

+20 −1
Original line number Diff line number Diff line
@@ -1601,6 +1601,9 @@ enum emulation_result kvm_mips_emulate_cache(union mips_instruction inst, 


	base = inst.i_format.rs;

	op_inst = inst.i_format.rt;

	if (cpu_has_mips_r6)

		offset = inst.spec3_format.simmediate;

	else

		offset = inst.i_format.simmediate;

	cache = op_inst & CacheOp_Cache;

	op = op_inst & CacheOp_Op;
@@ -1764,11 +1767,27 @@ enum emulation_result kvm_mips_emulate_inst(u32 cause, u32 *opc, 
		er = kvm_mips_emulate_load(inst, cause, run, vcpu);

		break;



#ifndef CONFIG_CPU_MIPSR6

	case cache_op:

		++vcpu->stat.cache_exits;

		trace_kvm_exit(vcpu, KVM_TRACE_EXIT_CACHE);

		er = kvm_mips_emulate_cache(inst, opc, cause, run, vcpu);

		break;

#else

	case spec3_op:

		switch (inst.spec3_format.func) {

		case cache6_op:

			++vcpu->stat.cache_exits;

			trace_kvm_exit(vcpu, KVM_TRACE_EXIT_CACHE);

			er = kvm_mips_emulate_cache(inst, opc, cause, run,

						    vcpu);

			break;

		default:

			goto unknown;

		};

		break;

unknown:

#endif



	default:

		kvm_err("Instruction emulation not supported (%p/%#x)\n", opc,

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