Commit 5ca54fdc authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Joerg Roedel
Browse files

iommu/ipmmu-vmsa: Move IMTTBCR_SL0_TWOBIT_* to restore sort order 



Move the recently added IMTTBCR_SL0_TWOBIT_* definitions up, to make
sure all IMTTBCR register bit definitions are sorted by decreasing bit
index.  Add comments to make it clear that they exist on R-Car Gen3
only.

Fixes: c295f504 ("iommu/ipmmu-vmsa: Allow two bit SL0")
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 089cf7f6

drivers/iommu/ipmmu-vmsa.c

+3 −4
Original line number Diff line number Diff line
@@ -145,15 +145,14 @@ static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev) 
#define IMTTBCR_IRGN0_WT		(2 << 8)

#define IMTTBCR_IRGN0_WB		(3 << 8)

#define IMTTBCR_IRGN0_MASK		(3 << 8)

#define IMTTBCR_SL0_TWOBIT_LVL_3	(0 << 6)	/* R-Car Gen3 only */

#define IMTTBCR_SL0_TWOBIT_LVL_2	(1 << 6)	/* R-Car Gen3 only */

#define IMTTBCR_SL0_TWOBIT_LVL_1	(2 << 6)	/* R-Car Gen3 only */

#define IMTTBCR_SL0_LVL_2		(0 << 4)

#define IMTTBCR_SL0_LVL_1		(1 << 4)

#define IMTTBCR_TSZ0_MASK		(7 << 0)

#define IMTTBCR_TSZ0_SHIFT		O



#define IMTTBCR_SL0_TWOBIT_LVL_3	(0 << 6)

#define IMTTBCR_SL0_TWOBIT_LVL_2	(1 << 6)

#define IMTTBCR_SL0_TWOBIT_LVL_1	(2 << 6)



#define IMBUSCR				0x000c

#define IMBUSCR_DVM			(1 << 2)

#define IMBUSCR_BUSSEL_SYS		(0 << 0)

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