Commit 5c9114d0 authored by Shubhangi Shrivastava's avatar Shubhangi Shrivastava Committed by Ander Conselvan de Oliveira
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drm/i915: Reorganizing intel_dp_check_link_status 



When created originally intel_dp_check_link_status()
was supposed to handle only link training for short
pulse but has grown into handler for short pulse itself.
This patch cleans up this function by splitting it into
two halves. First intel_dp_short_pulse() is called,
which will be entry point and handle all logic for
short pulse handling while intel_dp_check_link_status()
will retain its original purpose of only doing link
status related work.

intel_dp_short_pulse: All existing code other than
link status read and link training upon error status.

intel_dp_check_link_status:
The link status should be read on short pulse
irrespective of panel being enabled or not so
intel_dp_get_link_status() performs dpcd read first
then based on crtc active / enabled it will
perform the link training.

This is because short pulse is a generic interrupt
which should always be handled, because it may mean:
	1. Hotplug/unplug of MST panel
	2. Hotplug/unplug of dongle
	3. Link status change for other DP panels

v2: Added WARN_ON to intel_dp_check_link_status()
    Removed a call to intel_dp_get_link_status() (Ander)

v3: Changed commit message to explain need of link status
    being read before performing encoder checks (Daniel)

v4: Changed commit message to explain need of reading
    link status on short pulse (Ander)

Tested-by: default avatarNathan D Ciobanu <nathan.d.ciobanu@intel.com>
Signed-off-by: default avatarSivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: default avatarShubhangi Shrivastava <shubhangi.shrivastava@intel.com>
Reviewed-by: default avatarAnder Conselvan de Oliveira <conselvan2@gmail.com>
[anderco: fix parenthesis alignment]
Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459341326-13142-3-git-send-email-shubhangi.shrivastava@intel.com
parent 7d23e3c3

drivers/gpu/drm/i915/intel_dp.c

+36 −29
Original line number Diff line number Diff line
@@ -4215,6 +4215,36 @@ go_again: 
	return -EINVAL;

}



static void

intel_dp_check_link_status(struct intel_dp *intel_dp)

{

	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;

	struct drm_device *dev = intel_dp_to_dev(intel_dp);

	u8 link_status[DP_LINK_STATUS_SIZE];



	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));



	if (!intel_dp_get_link_status(intel_dp, link_status)) {

		DRM_ERROR("Failed to get link status\n");

		return;

	}



	if (!intel_encoder->base.crtc)

		return;



	if (!to_intel_crtc(intel_encoder->base.crtc)->active)

		return;



	/* if link training is requested we should perform it always */

	if ((intel_dp->compliance_test_type == DP_TEST_LINK_TRAINING) ||

	    (!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count))) {

		DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",

			      intel_encoder->base.name);

		intel_dp_start_link_train(intel_dp);

		intel_dp_stop_link_train(intel_dp);

	}

}



/*

 * According to DP spec

 * 5.1.2:
@@ -4224,14 +4254,10 @@ go_again: 
 *  4. Check link status on receipt of hot-plug interrupt

 */

static void

intel_dp_check_link_status(struct intel_dp *intel_dp)

intel_dp_short_pulse(struct intel_dp *intel_dp)

{

	struct drm_device *dev = intel_dp_to_dev(intel_dp);

	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;

	u8 sink_irq_vector;

	u8 link_status[DP_LINK_STATUS_SIZE];



	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));



	/*

	 * Clearing compliance test variables to allow capturing
@@ -4241,17 +4267,6 @@ intel_dp_check_link_status(struct intel_dp *intel_dp) 
	intel_dp->compliance_test_type = 0;

	intel_dp->compliance_test_data = 0;



	if (!intel_encoder->base.crtc)

		return;



	if (!to_intel_crtc(intel_encoder->base.crtc)->active)

		return;



	/* Try to read receiver status if the link appears to be up */

	if (!intel_dp_get_link_status(intel_dp, link_status)) {

		return;

	}



	/* Now read the DPCD to see if it's actually running */

	if (!intel_dp_get_dpcd(intel_dp)) {

		return;
@@ -4271,14 +4286,9 @@ intel_dp_check_link_status(struct intel_dp *intel_dp) 
			DRM_DEBUG_DRIVER("CP or sink specific irq unhandled\n");

	}



	/* if link training is requested we should perform it always */

	if ((intel_dp->compliance_test_type == DP_TEST_LINK_TRAINING) ||

		(!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count))) {

		DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",

			      intel_encoder->base.name);

		intel_dp_start_link_train(intel_dp);

		intel_dp_stop_link_train(intel_dp);

	}

	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);

	intel_dp_check_link_status(intel_dp);

	drm_modeset_unlock(&dev->mode_config.connection_mutex);

}



/* XXX this is probably wrong for multiple downstream ports */
@@ -5017,11 +5027,8 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) 
			}

		}



		if (!intel_dp->is_mst) {

			drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);

			intel_dp_check_link_status(intel_dp);

			drm_modeset_unlock(&dev->mode_config.connection_mutex);

		}

		if (!intel_dp->is_mst)

			intel_dp_short_pulse(intel_dp);

	}



	ret = IRQ_HANDLED;

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