Commit 5c8c397c authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-misc-next-2019-04-10' of git://anongit.freedesktop.org/drm/drm-misc into drm-next 



drm-misc-next for 5.2:

UAPI Changes:
- None

Cross-subsystem Changes:
-MAINTAINERS: Add moderation flag for lima mailing list (Randy)
-dt-bindings: Add Mali Bifrost bindings (Neil)
-dt-bindings: Add G12A compatibility strings to meson bindings (Neil)

Core Changes:
-Add a handful of format helpers (Gerd)

Driver Changes:
-cirrus: Driver rewrite megapatch (Gerd)
-meson: Add G12A support to meson driver (Neil)
-lima: Couple fixes (Qiang)

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Qiang Yu <yuq825@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Sean Paul <sean@poorly.run>
Link: https://patchwork.freedesktop.org/patch/msgid/20190410194907.GA108842@art_vandelay
parents 14d2bd53 80bb8d98

Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.txt

+4 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ Required properties: 
	- GXL (S905X, S905D) : "amlogic,meson-gxl-dw-hdmi"

	- GXM (S912) : "amlogic,meson-gxm-dw-hdmi"

	followed by the common "amlogic,meson-gx-dw-hdmi"

	- G12A (S905X2, S905Y2, S905D2) : "amlogic,meson-g12a-dw-hdmi"

- reg: Physical base address and length of the controller's registers.

- interrupts: The HDMI interrupt number

- clocks, clock-names : must have the phandles to the HDMI iahb and isfr clocks,
@@ -66,6 +67,9 @@ corresponding to each HDMI output and input. 
 S905X (GXL)	VENC Input	TMDS Output

 S905D (GXL)	VENC Input	TMDS Output

 S912 (GXM)	VENC Input	TMDS Output

 S905X2 (G12A)	VENC Input	TMDS Output

 S905Y2 (G12A)	VENC Input	TMDS Output

 S905D2 (G12A)	VENC Input	TMDS Output



Example:

Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt

+4 −0
Original line number Diff line number Diff line
@@ -57,6 +57,7 @@ Required properties: 
	- GXL (S905X, S905D) : "amlogic,meson-gxl-vpu"

	- GXM (S912) : "amlogic,meson-gxm-vpu"

	followed by the common "amlogic,meson-gx-vpu"

	- G12A (S905X2, S905Y2, S905D2) : "amlogic,meson-g12a-vpu"

- reg: base address and size of he following memory-mapped regions :

	- vpu

	- hhi
@@ -83,6 +84,9 @@ corresponding to each VPU output. 
 S905X (GXL)	CVBS VDAC	HDMI-TX

 S905D (GXL)	CVBS VDAC	HDMI-TX

 S912 (GXM)	CVBS VDAC	HDMI-TX

 S905X2 (G12A)	CVBS VDAC	HDMI-TX

 S905Y2 (G12A)	CVBS VDAC	HDMI-TX

 S905D2 (G12A)	CVBS VDAC	HDMI-TX



Example:

Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt

0 → 100644
+92 −0
Original line number Diff line number Diff line 
ARM Mali Bifrost GPU

====================



Required properties:



- compatible :

  * Since Mali Bifrost GPU model/revision is fully discoverable by reading

    some determined registers, must contain the following:

    + "arm,mali-bifrost"

  * which must be preceded by one of the following vendor specifics:

    + "amlogic,meson-g12a-mali"



- reg : Physical base address of the device and length of the register area.



- interrupts : Contains the three IRQ lines required by Mali Bifrost devices,

  in the following defined order.



- interrupt-names : Contains the names of IRQ resources in this exact defined

  order: "job", "mmu", "gpu".



Optional properties:



- clocks : Phandle to clock for the Mali Bifrost device.



- mali-supply : Phandle to regulator for the Mali device. Refer to

  Documentation/devicetree/bindings/regulator/regulator.txt for details.



- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt

  for details.



- resets : Phandle of the GPU reset line.



Vendor-specific bindings

------------------------



The Mali GPU is integrated very differently from one SoC to

another. In order to accommodate those differences, you have the option

to specify one more vendor-specific compatible, among:



- "amlogic,meson-g12a-mali"

  Required properties:

  - resets : Should contain phandles of :

    + GPU reset line

    + GPU APB glue reset line



Example for a Mali-G31:



gpu@ffa30000 {

	compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";

	reg = <0xffe40000 0x10000>;

	interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;

	interrupt-names = "job", "mmu", "gpu";

	clocks = <&clk CLKID_MALI>;

	mali-supply = <&vdd_gpu>;

	operating-points-v2 = <&gpu_opp_table>;

	resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;

};



gpu_opp_table: opp_table0 {

	compatible = "operating-points-v2";



	opp@533000000 {

		opp-hz = /bits/ 64 <533000000>;

		opp-microvolt = <1250000>;

	};

	opp@450000000 {

		opp-hz = /bits/ 64 <450000000>;

		opp-microvolt = <1150000>;

	};

	opp@400000000 {

		opp-hz = /bits/ 64 <400000000>;

		opp-microvolt = <1125000>;

	};

	opp@350000000 {

		opp-hz = /bits/ 64 <350000000>;

		opp-microvolt = <1075000>;

	};

	opp@266000000 {

		opp-hz = /bits/ 64 <266000000>;

		opp-microvolt = <1025000>;

	};

	opp@160000000 {

		opp-hz = /bits/ 64 <160000000>;

		opp-microvolt = <925000>;

	};

	opp@100000000 {

		opp-hz = /bits/ 64 <100000000>;

		opp-microvolt = <912500>;

	};

};

Documentation/gpu/meson.rst

+0 −6
Original line number Diff line number Diff line
@@ -42,12 +42,6 @@ Video Encoder 
.. kernel-doc:: drivers/gpu/drm/meson/meson_venc.c

   :doc: Video Encoder



Video Canvas Management

=======================



.. kernel-doc:: drivers/gpu/drm/meson/meson_canvas.c

   :doc: Canvas



Video Clocks

============

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -5209,7 +5209,7 @@ F: Documentation/devicetree/bindings/display/hisilicon/ 
DRM DRIVERS FOR LIMA

M:	Qiang Yu <yuq825@gmail.com>

L:	dri-devel@lists.freedesktop.org

L:	lima@lists.freedesktop.org

L:	lima@lists.freedesktop.org (moderated for non-subscribers)

S:	Maintained

F:	drivers/gpu/drm/lima/

F:	include/uapi/drm/lima_drm.h

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