Commit 5c4e0602 authored by Alexandre Courbot's avatar Alexandre Courbot Committed by Ben Skeggs
Browse files

drm/nouveau/secboot: fix usage of hsf_load_header 



Offsets were not properly computed. This went unnoticed because we are
only using one app for now.

Signed-off-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 913b97f9

drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c

+3 −3
Original line number Diff line number Diff line
@@ -533,8 +533,8 @@ acr_r352_generate_hs_bl_desc(const struct hsf_load_header *hdr, void *_bl_desc, 
	bl_desc->code_dma_base = lower_32_bits(addr_code);

	bl_desc->non_sec_code_off = hdr->non_sec_code_off;

	bl_desc->non_sec_code_size = hdr->non_sec_code_size;

	bl_desc->sec_code_off = hdr->app[0].sec_code_off;

	bl_desc->sec_code_size = hdr->app[0].sec_code_size;

	bl_desc->sec_code_off = hsf_load_header_app_off(hdr, 0);

	bl_desc->sec_code_size = hsf_load_header_app_size(hdr, 0);

	bl_desc->code_entry_point = 0;

	bl_desc->data_dma_base = lower_32_bits(addr_data);

	bl_desc->data_size = hdr->data_size;
@@ -589,7 +589,7 @@ acr_r352_prepare_hs_blob(struct acr_r352 *acr, struct nvkm_secboot *sb, 
		goto cleanup;

	}

	memcpy(load_header, load_hdr, sizeof(*load_header) +

			       (sizeof(load_hdr->app[0]) * load_hdr->num_apps));

			  (sizeof(load_hdr->apps[0]) * 2 * load_hdr->num_apps));



	/* Create ACR blob and copy HS data to it */

	ret = nvkm_gpuobj_new(subdev->device, ALIGN(hsbin_hdr->data_size, 256),

drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h

+25 −8
Original line number Diff line number Diff line
@@ -133,11 +133,6 @@ struct ls_ucode_img_r352 { 
 * HS blob structures

 */



struct hsf_load_header_app {

	u32 sec_code_off;

	u32 sec_code_size;

};



/**

 * struct hsf_load_header - HS firmware load header

 */
@@ -147,9 +142,31 @@ struct hsf_load_header { 
	u32 data_dma_base;

	u32 data_size;

	u32 num_apps;

	struct hsf_load_header_app app[0];

	/*

	 * Organized as follows:

	 * - app0_code_off

	 * - app1_code_off

	 * - ...

	 * - appn_code_off

	 * - app0_code_size

	 * - app1_code_size

	 * - ...

	 */

	u32 apps[0];

};



static inline u32

hsf_load_header_app_off(const struct hsf_load_header *hdr, u32 app)

{

	return hdr->apps[app];

}



static inline u32

hsf_load_header_app_size(const struct hsf_load_header *hdr, u32 app)

{

	return hdr->apps[hdr->num_apps + app];

}



/**

 * struct acr_r352_ls_func - manages a single LS firmware

 *
@@ -204,14 +221,14 @@ struct acr_r352 { 
	struct nvkm_gpuobj *load_blob;

	struct {

		struct hsf_load_header load_bl_header;

		struct hsf_load_header_app __load_apps[ACR_R352_MAX_APPS];

		u32 __load_apps[ACR_R352_MAX_APPS * 2];

	};



	/* HS FW - unlock WPR region (dGPU only) */

	struct nvkm_gpuobj *unload_blob;

	struct {

		struct hsf_load_header unload_bl_header;

		struct hsf_load_header_app __unload_apps[ACR_R352_MAX_APPS];

		u32 __unload_apps[ACR_R352_MAX_APPS * 2];

	};



	/* HS bootloader */

drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c

+2 −2
Original line number Diff line number Diff line
@@ -94,8 +94,8 @@ acr_r361_generate_hs_bl_desc(const struct hsf_load_header *hdr, void *_bl_desc, 
	bl_desc->code_dma_base = u64_to_flcn64(offset);

	bl_desc->non_sec_code_off = hdr->non_sec_code_off;

	bl_desc->non_sec_code_size = hdr->non_sec_code_size;

	bl_desc->sec_code_off = hdr->app[0].sec_code_off;

	bl_desc->sec_code_size = hdr->app[0].sec_code_size;

	bl_desc->sec_code_off = hsf_load_header_app_off(hdr, 0);

	bl_desc->sec_code_size = hsf_load_header_app_size(hdr, 0);

	bl_desc->code_entry_point = 0;

	bl_desc->data_dma_base = u64_to_flcn64(offset + hdr->data_dma_base);

	bl_desc->data_size = hdr->data_size;

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