Commit 5c1a4f40 authored by Ramuthevar Vadivel Muruganx's avatar Ramuthevar Vadivel Muruganx Committed by Ulf Hansson
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mmc: sdhci-of-arasan: Add Support for Intel LGM eMMC 



The current arasan sdhci PHY configuration isn't compatible
with the PHY on Intel's LGM(Lightning Mountain) SoC devices.

Therefore, add a new compatible, to adapt the Intel's LGM
eMMC PHY with arasan-sdhc controller to configure the PHY.

Signed-off-by: default avatarRamuthevar Vadivel Muruganx <vadivel.muruganx.ramuthevar@linux.intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 310da16e

drivers/mmc/host/sdhci-of-arasan.c

+15 −0
Original line number Diff line number Diff line
@@ -114,6 +114,12 @@ static const struct sdhci_arasan_soc_ctl_map rk3399_soc_ctl_map = { 
	.hiword_update = true,

};



static const struct sdhci_arasan_soc_ctl_map intel_lgm_emmc_soc_ctl_map = {

	.baseclkfreq = { .reg = 0xa0, .width = 8, .shift = 2 },

	.clockmultiplier = { .reg = 0, .width = -1, .shift = -1 },

	.hiword_update = false,

};



/**

 * sdhci_arasan_syscon_write - Write to a field in soc_ctl registers

 *
@@ -373,6 +379,11 @@ static struct sdhci_arasan_of_data sdhci_arasan_rk3399_data = { 
	.pdata = &sdhci_arasan_cqe_pdata,

};



static struct sdhci_arasan_of_data intel_lgm_emmc_data = {

	.soc_ctl_map = &intel_lgm_emmc_soc_ctl_map,

	.pdata = &sdhci_arasan_cqe_pdata,

};



#ifdef CONFIG_PM_SLEEP

/**

 * sdhci_arasan_suspend - Suspend method for the driver
@@ -474,6 +485,10 @@ static const struct of_device_id sdhci_arasan_of_match[] = { 
		.compatible = "rockchip,rk3399-sdhci-5.1",

		.data = &sdhci_arasan_rk3399_data,

	},

	{

		.compatible = "intel,lgm-sdhci-5.1-emmc",

		.data = &intel_lgm_emmc_data,

	},

	/* Generic compatible below here */

	{

		.compatible = "arasan,sdhci-8.9a",

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