Commit 5b9fa9cb authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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soc: renesas: rcar-sysc: Add R8A7742 support 



Add support for RZ/G1H (R8A7742) SoC power areas to the R-Car SYSC driver.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1587678050-23468-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 557b7e54

drivers/soc/renesas/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -261,6 +261,10 @@ config ARCH_R8A77995 
endif # ARM64



# SoC

config SYSC_R8A7742

	bool "RZ/G1H System Controller support" if COMPILE_TEST

	select SYSC_RCAR



config SYSC_R8A7743

	bool "RZ/G1M System Controller support" if COMPILE_TEST

	select SYSC_RCAR

drivers/soc/renesas/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
obj-$(CONFIG_SOC_RENESAS)	+= renesas-soc.o



# SoC

obj-$(CONFIG_SYSC_R8A7742)	+= r8a7742-sysc.o

obj-$(CONFIG_SYSC_R8A7743)	+= r8a7743-sysc.o

obj-$(CONFIG_SYSC_R8A7745)	+= r8a7745-sysc.o

obj-$(CONFIG_SYSC_R8A77470)	+= r8a77470-sysc.o

drivers/soc/renesas/r8a7742-sysc.c

0 → 100644
+42 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Renesas RZ/G1H System Controller

 *

 * Copyright (C) 2020 Renesas Electronics Corp.

 */



#include <linux/kernel.h>



#include <dt-bindings/power/r8a7742-sysc.h>



#include "rcar-sysc.h"



static const struct rcar_sysc_area r8a7742_areas[] __initconst = {

	{ "always-on",	    0, 0, R8A7742_PD_ALWAYS_ON,	-1, PD_ALWAYS_ON },

	{ "ca15-scu",	0x180, 0, R8A7742_PD_CA15_SCU,	R8A7742_PD_ALWAYS_ON,

	  PD_SCU },

	{ "ca15-cpu0",	 0x40, 0, R8A7742_PD_CA15_CPU0,	R8A7742_PD_CA15_SCU,

	  PD_CPU_NOCR },

	{ "ca15-cpu1",	 0x40, 1, R8A7742_PD_CA15_CPU1,	R8A7742_PD_CA15_SCU,

	  PD_CPU_NOCR },

	{ "ca15-cpu2",	 0x40, 2, R8A7742_PD_CA15_CPU2,	R8A7742_PD_CA15_SCU,

	  PD_CPU_NOCR },

	{ "ca15-cpu3",	 0x40, 3, R8A7742_PD_CA15_CPU3,	R8A7742_PD_CA15_SCU,

	  PD_CPU_NOCR },

	{ "ca7-scu",	0x100, 0, R8A7742_PD_CA7_SCU,	R8A7742_PD_ALWAYS_ON,

	  PD_SCU },

	{ "ca7-cpu0",	0x1c0, 0, R8A7742_PD_CA7_CPU0,	R8A7742_PD_CA7_SCU,

	  PD_CPU_NOCR },

	{ "ca7-cpu1",	0x1c0, 1, R8A7742_PD_CA7_CPU1,	R8A7742_PD_CA7_SCU,

	  PD_CPU_NOCR },

	{ "ca7-cpu2",	0x1c0, 2, R8A7742_PD_CA7_CPU2,	R8A7742_PD_CA7_SCU,

	  PD_CPU_NOCR },

	{ "ca7-cpu3",	0x1c0, 3, R8A7742_PD_CA7_CPU3,	R8A7742_PD_CA7_SCU,

	  PD_CPU_NOCR },

	{ "rgx",	 0xc0, 0, R8A7742_PD_RGX,	R8A7742_PD_ALWAYS_ON },

};



const struct rcar_sysc_info r8a7742_sysc_info __initconst = {

	.areas = r8a7742_areas,

	.num_areas = ARRAY_SIZE(r8a7742_areas),

};

drivers/soc/renesas/rcar-sysc.c

+3 −0
Original line number Diff line number Diff line
@@ -273,6 +273,9 @@ finalize: 
}



static const struct of_device_id rcar_sysc_matches[] __initconst = {

#ifdef CONFIG_SYSC_R8A7742

	{ .compatible = "renesas,r8a7742-sysc", .data = &r8a7742_sysc_info },

#endif

#ifdef CONFIG_SYSC_R8A7743

	{ .compatible = "renesas,r8a7743-sysc", .data = &r8a7743_sysc_info },

	/* RZ/G1N is identical to RZ/G2M w.r.t. power domains. */

drivers/soc/renesas/rcar-sysc.h

+1 −0
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ struct rcar_sysc_info { 
	u32 extmask_val;	/* SYSCEXTMASK register mask value */

};



extern const struct rcar_sysc_info r8a7742_sysc_info;

extern const struct rcar_sysc_info r8a7743_sysc_info;

extern const struct rcar_sysc_info r8a7745_sysc_info;

extern const struct rcar_sysc_info r8a77470_sysc_info;

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