Commit 5b9ca526 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Paul Mackerras
Browse files

[PATCH] 3/5 powerpc: Add platform functions interpreter 



This is the platform function interpreter itself along with the backends
for UniN/U3/U4, mac-io, GPIOs and i2c. It adds the ability to execute
those do-platform-* scripts in the device-tree (at least for most
devices for which a backend is provided). This should replace the clock
spreading hacks properly. It might also have an impact on all sort of
machines since some of the scripts marked "at init" will now be executed
on boot (or some other on sleep/wakeup), those will possibly do things
that the kernel didn't do at all, like setting some values into some i2c
devices (changing thermal sensor calibration or conversion rate) etc...
Thus regression testing is MUCH welcome. Also loook for errors in dmesg.
That's also why I've left rather verbose debugging enabled in this
version of the patch.

(I do expect some Windtunnel G4s to show some errors as they have an i2c
clock chip on the PMU bus that uses some primitives that the i2c backend
doesn't implement yet. I really need users that have one of those
machine to come back to me so we can get that done right, though the
errors themselves should be harmless, I suspect the machine might not
run at full speed).

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent a28d3af2

arch/powerpc/platforms/powermac/Makefile

+2 −1
Original line number Diff line number Diff line 
CFLAGS_bootx_init.o  		+= -fPIC



obj-y				+= pic.o setup.o time.o feature.o pci.o \

				   sleep.o low_i2c.o cache.o

				   sleep.o low_i2c.o cache.o pfunc_core.o \

				   pfunc_base.o

obj-$(CONFIG_PMAC_BACKLIGHT)	+= backlight.o

obj-$(CONFIG_CPU_FREQ_PMAC)	+= cpufreq_32.o

obj-$(CONFIG_CPU_FREQ_PMAC64)	+= cpufreq_64.o

arch/powerpc/platforms/powermac/feature.c

+21 −25
Original line number Diff line number Diff line
@@ -58,12 +58,11 @@ extern int powersave_lowspeed; 
extern int powersave_nap;

extern struct device_node *k2_skiplist[2];





/*

 * We use a single global lock to protect accesses. Each driver has

 * to take care of its own locking

 */

static DEFINE_SPINLOCK(feature_lock);

DEFINE_SPINLOCK(feature_lock);



#define LOCK(flags)	spin_lock_irqsave(&feature_lock, flags);

#define UNLOCK(flags)	spin_unlock_irqrestore(&feature_lock, flags);
@@ -106,22 +105,12 @@ static const char *macio_names[] = 
};





struct device_node *uninorth_node;

u32 __iomem *uninorth_base;



/*

 * Uninorth reg. access. Note that Uni-N regs are big endian

 */



#define UN_REG(r)	(uninorth_base + ((r) >> 2))

#define UN_IN(r)	(in_be32(UN_REG(r)))

#define UN_OUT(r,v)	(out_be32(UN_REG(r), (v)))

#define UN_BIS(r,v)	(UN_OUT((r), UN_IN(r) | (v)))

#define UN_BIC(r,v)	(UN_OUT((r), UN_IN(r) & ~(v)))



static struct device_node *uninorth_node;

static u32 __iomem *uninorth_base;

static u32 uninorth_rev;

static int uninorth_maj;

static void __iomem *u3_ht;

static void __iomem *u3_ht_base;



/*

 * For each motherboard family, we have a table of functions pointers
@@ -1560,8 +1549,10 @@ void g5_phy_disable_cpu1(void) 


#ifndef CONFIG_POWER4



static void

keylargo_shutdown(struct macio_chip *macio, int sleep_mode)



#ifdef CONFIG_PM



static void keylargo_shutdown(struct macio_chip *macio, int sleep_mode)

{

	u32 temp;
@@ -1614,8 +1605,7 @@ keylargo_shutdown(struct macio_chip *macio, int sleep_mode) 
	(void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);

}



static void

pangea_shutdown(struct macio_chip *macio, int sleep_mode)

static void pangea_shutdown(struct macio_chip *macio, int sleep_mode)

{

	u32 temp;
@@ -1648,8 +1638,7 @@ pangea_shutdown(struct macio_chip *macio, int sleep_mode) 
	(void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);

}



static void

intrepid_shutdown(struct macio_chip *macio, int sleep_mode)

static void intrepid_shutdown(struct macio_chip *macio, int sleep_mode)

{

	u32 temp;
@@ -1833,6 +1822,8 @@ core99_wake_up(void) 
	return 0;

}



#endif /* CONFIG_PM */



static long

core99_sleep_state(struct device_node *node, long param, long value)

{
@@ -1854,10 +1845,13 @@ core99_sleep_state(struct device_node *node, long param, long value) 
	if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)

		return -EPERM;



#ifdef CONFIG_PM

	if (value == 1)

		return core99_sleep();

	else if (value == 0)

		return core99_wake_up();



#endif /* CONFIG_PM */

	return 0;

}
@@ -1981,7 +1975,9 @@ static struct feature_table_entry core99_features[] = { 
	{ PMAC_FTR_USB_ENABLE,		core99_usb_enable },

	{ PMAC_FTR_1394_ENABLE,		core99_firewire_enable },

	{ PMAC_FTR_1394_CABLE_POWER,	core99_firewire_cable_power },

#ifdef CONFIG_PM

	{ PMAC_FTR_SLEEP_STATE,		core99_sleep_state },

#endif

#ifdef CONFIG_SMP

	{ PMAC_FTR_RESET_CPU,		core99_reset_cpu },

#endif /* CONFIG_SMP */
@@ -2572,7 +2568,7 @@ static void __init probe_uninorth(void) 
	uninorth_base = ioremap(address, 0x40000);

	uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));

	if (uninorth_maj == 3 || uninorth_maj == 4)

		u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);

		u3_ht_base = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);



	printk(KERN_INFO "Found %s memory controller & host bridge"

	       " @ 0x%08x revision: 0x%02x\n", uninorth_maj == 3 ? "U3" :
@@ -2921,9 +2917,9 @@ void __init pmac_check_ht_link(void) 
	u8	px_bus, px_devfn;

	struct pci_controller *px_hose;



	(void)in_be32(u3_ht + U3_HT_LINK_COMMAND);

	ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG);

	ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ);

	(void)in_be32(u3_ht_base + U3_HT_LINK_COMMAND);

	ucfg = cfg = in_be32(u3_ht_base + U3_HT_LINK_CONFIG);

	ufreq = freq = in_be32(u3_ht_base + U3_HT_LINK_FREQ);

	dump_HT_speeds("U3 HyperTransport", cfg, freq);



	pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");

arch/powerpc/platforms/powermac/low_i2c.c

+292 −2
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ 
#include <asm/prom.h>

#include <asm/machdep.h>

#include <asm/smu.h>

#include <asm/pmac_pfunc.h>

#include <asm/pmac_low_i2c.h>



#ifdef DEBUG
@@ -1162,9 +1163,291 @@ int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 
}

EXPORT_SYMBOL_GPL(pmac_i2c_xfer);



/* some quirks for platform function decoding */

enum {

	pmac_i2c_quirk_invmask = 0x00000001u,

};



static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,

					      int quirks))

{

	struct pmac_i2c_bus *bus;

	struct device_node *np;

	static struct whitelist_ent {

		char *name;

		char *compatible;

		int quirks;

	} whitelist[] = {

		/* XXX Study device-tree's & apple drivers are get the quirks

		 * right !

		 */

		{ "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },

		{ "i2c-cpu-voltage", NULL, 0},

		{  "temp-monitor", NULL, 0 },

		{  "supply-monitor", NULL, 0 },

		{ NULL, NULL, 0 },

	};



	/* Only some devices need to have platform functions instanciated

	 * here. For now, we have a table. Others, like 9554 i2c GPIOs used

	 * on Xserve, if we ever do a driver for them, will use their own

	 * platform function instance

	 */

	list_for_each_entry(bus, &pmac_i2c_busses, link) {

		for (np = NULL;

		     (np = of_get_next_child(bus->busnode, np)) != NULL;) {

			struct whitelist_ent *p;

			/* If multibus, check if device is on that bus */

			if (bus->flags & pmac_i2c_multibus)

				if (bus != pmac_i2c_find_bus(np))

					continue;

			for (p = whitelist; p->name != NULL; p++) {

				if (strcmp(np->name, p->name))

					continue;

				if (p->compatible &&

				    !device_is_compatible(np, p->compatible))

					continue;

				callback(np, p->quirks);

				break;

			}

		}

	}

}



#define MAX_I2C_DATA	64



struct pmac_i2c_pf_inst

{

	struct pmac_i2c_bus	*bus;

	u8			addr;

	u8			buffer[MAX_I2C_DATA];

	u8			scratch[MAX_I2C_DATA];

	int			bytes;

	int			quirks;

};



static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)

{

	struct pmac_i2c_pf_inst *inst;

	struct pmac_i2c_bus	*bus;



	bus = pmac_i2c_find_bus(func->node);

	if (bus == NULL) {

		printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",

		       func->node->full_name);

		return NULL;

	}

	if (pmac_i2c_open(bus, 0)) {

		printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",

		       func->node->full_name);

		return NULL;

	}



	/* XXX might need GFP_ATOMIC when called during the suspend process,

	 * but then, there are already lots of issues with suspending when

	 * near OOM that need to be resolved, the allocator itself should

	 * probably make GFP_NOIO implicit during suspend

	 */

	inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);

	if (inst == NULL) {

		pmac_i2c_close(bus);

		return NULL;

	}

	inst->bus = bus;

	inst->addr = pmac_i2c_get_dev_addr(func->node);

	inst->quirks = (int)(long)func->driver_data;

	return inst;

}



static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)

{

	struct pmac_i2c_pf_inst *inst = instdata;



	if (inst == NULL)

		return;

	pmac_i2c_close(inst->bus);

	if (inst)

		kfree(inst);

}



static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)

{

	struct pmac_i2c_pf_inst *inst = instdata;



	inst->bytes = len;

	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,

			     inst->buffer, len);

}



static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)

{

	struct pmac_i2c_pf_inst *inst = instdata;



	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,

			     (u8 *)data, len);

}



/* This function is used to do the masking & OR'ing for the "rmw" type

 * callbacks. Ze should apply the mask and OR in the values in the

 * buffer before writing back. The problem is that it seems that

 * various darwin drivers implement the mask/or differently, thus

 * we need to check the quirks first

 */

static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,

				  u32 len, const u8 *mask, const u8 *val)

{

	int i;



	if (inst->quirks & pmac_i2c_quirk_invmask) {

		for (i = 0; i < len; i ++)

			inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];

	} else {

		for (i = 0; i < len; i ++)

			inst->scratch[i] = (inst->buffer[i] & ~mask[i])

				| (val[i] & mask[i]);

	}

}



static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,

			   u32 totallen, const u8 *maskdata,

			   const u8 *valuedata)

{

	struct pmac_i2c_pf_inst *inst = instdata;



	if (masklen > inst->bytes || valuelen > inst->bytes ||

	    totallen > inst->bytes || valuelen > masklen)

		return -EINVAL;



	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);



	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,

			     inst->scratch, totallen);

}



static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)

{

	struct pmac_i2c_pf_inst *inst = instdata;



	inst->bytes = len;

	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,

			     inst->buffer, len);

}



static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,

				     const u8 *data)

{

	struct pmac_i2c_pf_inst *inst = instdata;



	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,

			     subaddr, (u8 *)data, len);

}



static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)

{

	struct pmac_i2c_pf_inst *inst = instdata;



	return pmac_i2c_setmode(inst->bus, mode);

}



static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,

			       u32 valuelen, u32 totallen, const u8 *maskdata,

			       const u8 *valuedata)

{

	struct pmac_i2c_pf_inst *inst = instdata;



	if (masklen > inst->bytes || valuelen > inst->bytes ||

	    totallen > inst->bytes || valuelen > masklen)

		return -EINVAL;



	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);



	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,

			     subaddr, inst->scratch, totallen);

}



static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,

				     const u8 *maskdata,

				     const u8 *valuedata)

{

	struct pmac_i2c_pf_inst *inst = instdata;

	int i, match;



	/* Get return value pointer, it's assumed to be a u32 */

	if (!args || !args->count || !args->u[0].p)

		return -EINVAL;



	/* Check buffer */

	if (len > inst->bytes)

		return -EINVAL;



	for (i = 0, match = 1; match && i < len; i ++)

		if ((inst->buffer[i] & maskdata[i]) != valuedata[i])

			match = 0;

	*args->u[0].p = match;

	return 0;

}



static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)

{

	msleep((duration + 999) / 1000);

	return 0;

}





static struct pmf_handlers pmac_i2c_pfunc_handlers = {

	.begin			= pmac_i2c_do_begin,

	.end			= pmac_i2c_do_end,

	.read_i2c		= pmac_i2c_do_read,

	.write_i2c		= pmac_i2c_do_write,

	.rmw_i2c		= pmac_i2c_do_rmw,

	.read_i2c_sub		= pmac_i2c_do_read_sub,

	.write_i2c_sub		= pmac_i2c_do_write_sub,

	.rmw_i2c_sub		= pmac_i2c_do_rmw_sub,

	.set_i2c_mode		= pmac_i2c_do_set_mode,

	.mask_and_compare	= pmac_i2c_do_mask_and_comp,

	.delay			= pmac_i2c_do_delay,

};



static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)

{

	DBG("dev_create(%s)\n", np->full_name);



	pmf_register_driver(np, &pmac_i2c_pfunc_handlers,

			    (void *)(long)quirks);

}



static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)

{

	DBG("dev_create(%s)\n", np->full_name);



	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);

}



static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)

{

	DBG("dev_suspend(%s)\n", np->full_name);

	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);

}



static void pmac_i2c_dev_resume(struct device_node *np, int quirks)

{

	DBG("dev_resume(%s)\n", np->full_name);

	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);

}



void pmac_pfunc_i2c_suspend(void)

{

	pmac_i2c_devscan(pmac_i2c_dev_suspend);

}



void pmac_pfunc_i2c_resume(void)

{

	pmac_i2c_devscan(pmac_i2c_dev_resume);

}



/*

 * Initialize us: probe all i2c busses on the machine and instantiate

 * busses.

 * Initialize us: probe all i2c busses on the machine, instantiate

 * busses and platform functions as needed.

 */

/* This is non-static as it might be called early by smp code */

int __init pmac_i2c_init(void)
@@ -1187,6 +1470,10 @@ int __init pmac_i2c_init(void) 
	/* Probe SMU i2c busses */

	smu_i2c_probe();

#endif



	/* Now add plaform functions for some known devices */

	pmac_i2c_devscan(pmac_i2c_dev_create);



	return 0;

}

arch_initcall(pmac_i2c_init);
@@ -1216,6 +1503,9 @@ static int __init pmac_i2c_create_platform_devices(void) 
		platform_device_add(bus->platform_dev);

	}



	/* Now call platform "init" functions */

	pmac_i2c_devscan(pmac_i2c_dev_init);



	return 0;

}

subsys_initcall(pmac_i2c_create_platform_devices);

arch/powerpc/platforms/powermac/pfunc_base.c

0 → 100644
+405 −0
Original line number Diff line number Diff line 
#include <linux/config.h>

#include <linux/types.h>

#include <linux/init.h>

#include <linux/delay.h>

#include <linux/kernel.h>

#include <linux/interrupt.h>

#include <linux/spinlock.h>



#include <asm/pmac_feature.h>

#include <asm/pmac_pfunc.h>



#define DBG(fmt...)	printk(fmt)



static irqreturn_t macio_gpio_irq(int irq, void *data, struct pt_regs *regs)

{

	pmf_do_irq(data);



	return IRQ_HANDLED;

}



static int macio_do_gpio_irq_enable(struct pmf_function *func)

{

	if (func->node->n_intrs < 1)

		return -EINVAL;



	return request_irq(func->node->intrs[0].line, macio_gpio_irq, 0,

			   func->node->name, func);

}



static int macio_do_gpio_irq_disable(struct pmf_function *func)

{

	if (func->node->n_intrs < 1)

		return -EINVAL;



	free_irq(func->node->intrs[0].line, func);

	return 0;

}



static int macio_do_gpio_write(PMF_STD_ARGS, u8 value, u8 mask)

{

	u8 __iomem *addr = (u8 __iomem *)func->driver_data;

	unsigned long flags;

	u8 tmp;



	/* Check polarity */

	if (args && args->count && !args->u[0].v)

		value = ~value;



	/* Toggle the GPIO */

	spin_lock_irqsave(&feature_lock, flags);

	tmp = readb(addr);

	tmp = (tmp & ~mask) | (value & mask);

	DBG("Do write 0x%02x to GPIO %s (%p)\n",

	    tmp, func->node->full_name, addr);

	writeb(tmp, addr);

	spin_unlock_irqrestore(&feature_lock, flags);



	return 0;

}



static int macio_do_gpio_read(PMF_STD_ARGS, u8 mask, int rshift, u8 xor)

{

	u8 __iomem *addr = (u8 __iomem *)func->driver_data;

	u32 value;



	/* Check if we have room for reply */

	if (args == NULL || args->count == 0 || args->u[0].p == NULL)

		return -EINVAL;



	value = readb(addr);

	*args->u[0].p = ((value & mask) >> rshift) ^ xor;



	return 0;

}



static int macio_do_delay(PMF_STD_ARGS, u32 duration)

{

	/* assume we can sleep ! */

	msleep((duration + 999) / 1000);

	return 0;

}



static struct pmf_handlers macio_gpio_handlers = {

	.irq_enable	= macio_do_gpio_irq_enable,

	.irq_disable	= macio_do_gpio_irq_disable,

	.write_gpio	= macio_do_gpio_write,

	.read_gpio	= macio_do_gpio_read,

	.delay		= macio_do_delay,

};



static void macio_gpio_init_one(struct macio_chip *macio)

{

	struct device_node *gparent, *gp;



	/*

	 * Find the "gpio" parent node

	 */



	for (gparent = NULL;

	     (gparent = of_get_next_child(macio->of_node, gparent)) != NULL;)

		if (strcmp(gparent->name, "gpio") == 0)

			break;

	if (gparent == NULL)

		return;



	DBG("Installing GPIO functions for macio %s\n",

	    macio->of_node->full_name);



	/*

	 * Ok, got one, we dont need anything special to track them down, so

	 * we just create them all

	 */

	for (gp = NULL; (gp = of_get_next_child(gparent, gp)) != NULL;) {

		u32 *reg = (u32 *)get_property(gp, "reg", NULL);

		unsigned long offset;

		if (reg == NULL)

			continue;

		offset = *reg;

		/* Deal with old style device-tree. We can safely hard code the

		 * offset for now too even if it's a bit gross ...

		 */

		if (offset < 0x50)

			offset += 0x50;

		offset += (unsigned long)macio->base;

		pmf_register_driver(gp, &macio_gpio_handlers, (void *)offset);

	}



	DBG("Calling initial GPIO functions for macio %s\n",

	    macio->of_node->full_name);



	/* And now we run all the init ones */

	for (gp = NULL; (gp = of_get_next_child(gparent, gp)) != NULL;)

		pmf_do_functions(gp, NULL, 0, PMF_FLAGS_ON_INIT, NULL);



	/* Note: We do not at this point implement the "at sleep" or "at wake"

	 * functions. I yet to find any for GPIOs anyway

	 */

}



static int macio_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask)

{

	struct macio_chip *macio = func->driver_data;

	unsigned long flags;



	spin_lock_irqsave(&feature_lock, flags);

	MACIO_OUT32(offset, (MACIO_IN32(offset) & ~mask) | (value & mask));

	spin_unlock_irqrestore(&feature_lock, flags);

	return 0;

}



static int macio_do_read_reg32(PMF_STD_ARGS, u32 offset)

{

	struct macio_chip *macio = func->driver_data;



	/* Check if we have room for reply */

	if (args == NULL || args->count == 0 || args->u[0].p == NULL)

		return -EINVAL;



	*args->u[0].p = MACIO_IN32(offset);

	return 0;

}



static int macio_do_write_reg8(PMF_STD_ARGS, u32 offset, u8 value, u8 mask)

{

	struct macio_chip *macio = func->driver_data;

	unsigned long flags;



	spin_lock_irqsave(&feature_lock, flags);

	MACIO_OUT8(offset, (MACIO_IN8(offset) & ~mask) | (value & mask));

	spin_unlock_irqrestore(&feature_lock, flags);

	return 0;

}



static int macio_do_read_reg8(PMF_STD_ARGS, u32 offset)

{

	struct macio_chip *macio = func->driver_data;



	/* Check if we have room for reply */

	if (args == NULL || args->count == 0 || args->u[0].p == NULL)

		return -EINVAL;



	*((u8 *)(args->u[0].p)) = MACIO_IN8(offset);

	return 0;

}



static int macio_do_read_reg32_msrx(PMF_STD_ARGS, u32 offset, u32 mask,

				    u32 shift, u32 xor)

{

	struct macio_chip *macio = func->driver_data;



	/* Check if we have room for reply */

	if (args == NULL || args->count == 0 || args->u[0].p == NULL)

		return -EINVAL;



	*args->u[0].p = ((MACIO_IN32(offset) & mask) >> shift) ^ xor;

	return 0;

}



static int macio_do_read_reg8_msrx(PMF_STD_ARGS, u32 offset, u32 mask,

				   u32 shift, u32 xor)

{

	struct macio_chip *macio = func->driver_data;



	/* Check if we have room for reply */

	if (args == NULL || args->count == 0 || args->u[0].p == NULL)

		return -EINVAL;



	*((u8 *)(args->u[0].p)) = ((MACIO_IN8(offset) & mask) >> shift) ^ xor;

	return 0;

}



static int macio_do_write_reg32_slm(PMF_STD_ARGS, u32 offset, u32 shift,

				    u32 mask)

{

	struct macio_chip *macio = func->driver_data;

	unsigned long flags;

	u32 tmp, val;



	/* Check args */

	if (args == NULL || args->count == 0)

		return -EINVAL;



	spin_lock_irqsave(&feature_lock, flags);

	tmp = MACIO_IN32(offset);

	val = args->u[0].v << shift;

	tmp = (tmp & ~mask) | (val & mask);

	MACIO_OUT32(offset, tmp);

	spin_unlock_irqrestore(&feature_lock, flags);

	return 0;

}



static int macio_do_write_reg8_slm(PMF_STD_ARGS, u32 offset, u32 shift,

				   u32 mask)

{

	struct macio_chip *macio = func->driver_data;

	unsigned long flags;

	u32 tmp, val;



	/* Check args */

	if (args == NULL || args->count == 0)

		return -EINVAL;



	spin_lock_irqsave(&feature_lock, flags);

	tmp = MACIO_IN8(offset);

	val = args->u[0].v << shift;

	tmp = (tmp & ~mask) | (val & mask);

	MACIO_OUT8(offset, tmp);

	spin_unlock_irqrestore(&feature_lock, flags);

	return 0;

}



static struct pmf_handlers macio_mmio_handlers = {

	.write_reg32		= macio_do_write_reg32,

	.read_reg32		= macio_do_read_reg32,

	.write_reg8		= macio_do_write_reg8,

	.read_reg32		= macio_do_read_reg8,

	.read_reg32_msrx	= macio_do_read_reg32_msrx,

	.read_reg8_msrx		= macio_do_read_reg8_msrx,

	.write_reg32_slm	= macio_do_write_reg32_slm,

	.write_reg8_slm		= macio_do_write_reg8_slm,

	.delay			= macio_do_delay,

};



static void macio_mmio_init_one(struct macio_chip *macio)

{

	DBG("Installing MMIO functions for macio %s\n",

	    macio->of_node->full_name);



	pmf_register_driver(macio->of_node, &macio_mmio_handlers, macio);

}



static struct device_node *unin_hwclock;



static int unin_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask)

{

	unsigned long flags;



	spin_lock_irqsave(&feature_lock, flags);

	/* This is fairly bogus in darwin, but it should work for our needs

	 * implemeted that way:

	 */

	UN_OUT(offset, (UN_IN(offset) & ~mask) | (value & mask));

	spin_unlock_irqrestore(&feature_lock, flags);

	return 0;

}





static struct pmf_handlers unin_mmio_handlers = {

	.write_reg32		= unin_do_write_reg32,

	.delay			= macio_do_delay,

};



static void uninorth_install_pfunc(void)

{

	struct device_node *np;



	DBG("Installing functions for UniN %s\n",

	    uninorth_node->full_name);



	/*

	 * Install handlers for the bridge itself

	 */

	pmf_register_driver(uninorth_node, &unin_mmio_handlers, NULL);

	pmf_do_functions(uninorth_node, NULL, 0, PMF_FLAGS_ON_INIT, NULL);





	/*

	 * Install handlers for the hwclock child if any

	 */

	for (np = NULL; (np = of_get_next_child(uninorth_node, np)) != NULL;)

		if (strcmp(np->name, "hw-clock") == 0) {

			unin_hwclock = np;

			break;

		}

	if (unin_hwclock) {

		DBG("Installing functions for UniN clock %s\n",

		    unin_hwclock->full_name);

		pmf_register_driver(unin_hwclock, &unin_mmio_handlers, NULL);

		pmf_do_functions(unin_hwclock, NULL, 0, PMF_FLAGS_ON_INIT,

				 NULL);

	}

}



/* We export this as the SMP code might init us early */

int __init pmac_pfunc_base_install(void)

{

	static int pfbase_inited;

	int i;



	if (pfbase_inited)

		return 0;

	pfbase_inited = 1;





	DBG("Installing base platform functions...\n");



	/*

	 * Locate mac-io chips and install handlers

	 */

	for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {

		if (macio_chips[i].of_node) {

			macio_mmio_init_one(&macio_chips[i]);

			macio_gpio_init_one(&macio_chips[i]);

		}

	}



	/*

	 * Install handlers for northbridge and direct mapped hwclock

	 * if any. We do not implement the config space access callback

	 * which is only ever used for functions that we do not call in

	 * the current driver (enabling/disabling cells in U2, mostly used

	 * to restore the PCI settings, we do that differently)

	 */

	if (uninorth_node && uninorth_base)

		uninorth_install_pfunc();



	DBG("All base functions installed\n");



	return 0;

}



arch_initcall(pmac_pfunc_base_install);



#ifdef CONFIG_PM



/* Those can be called by pmac_feature. Ultimately, I should use a sysdev

 * or a device, but for now, that's good enough until I sort out some

 * ordering issues. Also, we do not bother with GPIOs, as so far I yet have

 * to see a case where a GPIO function has the on-suspend or on-resume bit

 */

void pmac_pfunc_base_suspend(void)

{

	int i;



	for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {

		if (macio_chips[i].of_node)

			pmf_do_functions(macio_chips[i].of_node, NULL, 0,

					 PMF_FLAGS_ON_SLEEP, NULL);

	}

	if (uninorth_node)

		pmf_do_functions(uninorth_node, NULL, 0,

				 PMF_FLAGS_ON_SLEEP, NULL);

	if (unin_hwclock)

		pmf_do_functions(unin_hwclock, NULL, 0,

				 PMF_FLAGS_ON_SLEEP, NULL);

}



void pmac_pfunc_base_resume(void)

{

	int i;



	if (unin_hwclock)

		pmf_do_functions(unin_hwclock, NULL, 0,

				 PMF_FLAGS_ON_WAKE, NULL);

	if (uninorth_node)

		pmf_do_functions(uninorth_node, NULL, 0,

				 PMF_FLAGS_ON_WAKE, NULL);

	for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {

		if (macio_chips[i].of_node)

			pmf_do_functions(macio_chips[i].of_node, NULL, 0,

					 PMF_FLAGS_ON_WAKE, NULL);

	}

}



#endif /* CONFIG_PM */

arch/powerpc/platforms/powermac/pfunc_core.c

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