pwm: sun4i: Add an optional probe for bus clock (5b090b43) · Commits · 戴 / test

drivers/pwm/pwm-sun4i.c

+23 −0

Original line number	Diff line number	Diff line
		@@ -78,6 +78,7 @@ struct sun4i_pwm_data {

		struct sun4i_pwm_chip {
		struct pwm_chip chip;
		struct clk *bus_clk;
		struct clk *clk;
		struct reset_control *rst;
		void __iomem *base;
		@@ -391,6 +392,14 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
		}
		}

		pwm->bus_clk = devm_clk_get_optional(&pdev->dev, "bus");
		if (IS_ERR(pwm->bus_clk)) {
		if (PTR_ERR(pwm->rst) != -EPROBE_DEFER)
		dev_err(&pdev->dev, "get bus clock failed %pe\n",
		pwm->bus_clk);
		return PTR_ERR(pwm->bus_clk);
		}

		pwm->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
		if (IS_ERR(pwm->rst)) {
		if (PTR_ERR(pwm->rst) != -EPROBE_DEFER)
		@@ -407,6 +416,17 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
		return ret;
		}

		/*
		* We're keeping the bus clock on for the sake of simplicity.
		* Actually it only needs to be on for hardware register accesses.
		*/
		ret = clk_prepare_enable(pwm->bus_clk);
		if (ret) {
		dev_err(&pdev->dev, "cannot prepare and enable bus_clk %pe\n",
		ERR_PTR(ret));
		goto err_bus;
		}

		pwm->chip.dev = &pdev->dev;
		pwm->chip.ops = &sun4i_pwm_ops;
		pwm->chip.base = -1;
		@@ -427,6 +447,8 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
		return 0;

		err_pwm_add:
		clk_disable_unprepare(pwm->bus_clk);
		err_bus:
		reset_control_assert(pwm->rst);

		return ret;
		@@ -441,6 +463,7 @@ static int sun4i_pwm_remove(struct platform_device *pdev)
		if (ret)
		return ret;

		clk_disable_unprepare(pwm->bus_clk);
		reset_control_assert(pwm->rst);

		return 0;