Commit 5a787756 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pwm/for-4.15-rc1' of... 

Merge tag 'pwm/for-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "The changes for this release include power management improvements for
  the pwm-img driver, support for the backup mode on pwm-atmel-tcb as
  well as support for more hardware with the R-Car and Mediatek drivers.

  To round things off there's a bit of cleanup for sunxi and stm32-lp"

* tag 'pwm/for-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: stm32-lp: Remove pwm_is_enabled() check before calling pwm_disable()
  pwm: mediatek: Add MT2712/MT7622 support
  pwm: sunxi: Use of_device_get_match_data()
  pwm: atmel-tcb: Support backup mode
  dt-bindings: pwm: Add R-Car D3 device tree bindings
  pwm: img: Add runtime PM
  pwm: img: Add suspend / resume handling
parents 1b8c5cd8 f83e2ae2

Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ Required Properties: 
 - "renesas,pwm-r8a7794": for R-Car E2

 - "renesas,pwm-r8a7795": for R-Car H3

 - "renesas,pwm-r8a7796": for R-Car M3-W

 - "renesas,pwm-r8a77995": for R-Car D3

- reg: base address and length of the registers block for the PWM.

- #pwm-cells: should be 2. See pwm.txt in this directory for a description of

  the cells format.

drivers/pwm/pwm-atmel-tcb.c

+61 −2
Original line number Diff line number Diff line
@@ -37,11 +37,20 @@ struct atmel_tcb_pwm_device { 
	unsigned period;		/* PWM period expressed in clk cycles */

};



struct atmel_tcb_channel {

	u32 enabled;

	u32 cmr;

	u32 ra;

	u32 rb;

	u32 rc;

};



struct atmel_tcb_pwm_chip {

	struct pwm_chip chip;

	spinlock_t lock;

	struct atmel_tc *tc;

	struct atmel_tcb_pwm_device *pwms[NPWM];

	struct atmel_tcb_channel bkup[NPWM / 2];

};



static inline struct atmel_tcb_pwm_chip *to_tcb_chip(struct pwm_chip *chip)
@@ -175,12 +184,15 @@ static void atmel_tcb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) 
	 * Use software trigger to apply the new setting.

	 * If both PWM devices in this group are disabled we stop the clock.

	 */

	if (!(cmr & (ATMEL_TC_ACPC | ATMEL_TC_BCPC)))

	if (!(cmr & (ATMEL_TC_ACPC | ATMEL_TC_BCPC))) {

		__raw_writel(ATMEL_TC_SWTRG | ATMEL_TC_CLKDIS,

			     regs + ATMEL_TC_REG(group, CCR));

	else

		tcbpwmc->bkup[group].enabled = 1;

	} else {

		__raw_writel(ATMEL_TC_SWTRG, regs +

			     ATMEL_TC_REG(group, CCR));

		tcbpwmc->bkup[group].enabled = 0;

	}



	spin_unlock(&tcbpwmc->lock);

}
@@ -263,6 +275,7 @@ static int atmel_tcb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) 
	/* Use software trigger to apply the new setting */

	__raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,

		     regs + ATMEL_TC_REG(group, CCR));

	tcbpwmc->bkup[group].enabled = 1;

	spin_unlock(&tcbpwmc->lock);

	return 0;

}
@@ -445,10 +458,56 @@ static const struct of_device_id atmel_tcb_pwm_dt_ids[] = { 
};

MODULE_DEVICE_TABLE(of, atmel_tcb_pwm_dt_ids);



#ifdef CONFIG_PM_SLEEP

static int atmel_tcb_pwm_suspend(struct device *dev)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct atmel_tcb_pwm_chip *tcbpwm = platform_get_drvdata(pdev);

	void __iomem *base = tcbpwm->tc->regs;

	int i;



	for (i = 0; i < (NPWM / 2); i++) {

		struct atmel_tcb_channel *chan = &tcbpwm->bkup[i];



		chan->cmr = readl(base + ATMEL_TC_REG(i, CMR));

		chan->ra = readl(base + ATMEL_TC_REG(i, RA));

		chan->rb = readl(base + ATMEL_TC_REG(i, RB));

		chan->rc = readl(base + ATMEL_TC_REG(i, RC));

	}

	return 0;

}



static int atmel_tcb_pwm_resume(struct device *dev)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct atmel_tcb_pwm_chip *tcbpwm = platform_get_drvdata(pdev);

	void __iomem *base = tcbpwm->tc->regs;

	int i;



	for (i = 0; i < (NPWM / 2); i++) {

		struct atmel_tcb_channel *chan = &tcbpwm->bkup[i];



		writel(chan->cmr, base + ATMEL_TC_REG(i, CMR));

		writel(chan->ra, base + ATMEL_TC_REG(i, RA));

		writel(chan->rb, base + ATMEL_TC_REG(i, RB));

		writel(chan->rc, base + ATMEL_TC_REG(i, RC));

		if (chan->enabled) {

			writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,

				base + ATMEL_TC_REG(i, CCR));

		}

	}

	return 0;

}

#endif



static SIMPLE_DEV_PM_OPS(atmel_tcb_pwm_pm_ops, atmel_tcb_pwm_suspend,

			 atmel_tcb_pwm_resume);



static struct platform_driver atmel_tcb_pwm_driver = {

	.driver = {

		.name = "atmel-tcb-pwm",

		.of_match_table = atmel_tcb_pwm_dt_ids,

		.pm = &atmel_tcb_pwm_pm_ops,

	},

	.probe = atmel_tcb_pwm_probe,

	.remove = atmel_tcb_pwm_remove,

drivers/pwm/pwm-img.c

+141 −19
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include <linux/of.h>

#include <linux/of_device.h>

#include <linux/platform_device.h>

#include <linux/pm_runtime.h>

#include <linux/pwm.h>

#include <linux/regmap.h>

#include <linux/slab.h>
@@ -39,6 +40,8 @@ 
#define PERIP_PWM_PDM_CONTROL_CH_MASK		0x1

#define PERIP_PWM_PDM_CONTROL_CH_SHIFT(ch)	((ch) * 4)



#define IMG_PWM_PM_TIMEOUT			1000 /* ms */



/*

 * PWM period is specified with a timebase register,

 * in number of step periods. The PWM duty cycle is also
@@ -52,6 +55,8 @@ 
 */

#define MIN_TMBASE_STEPS			16



#define IMG_PWM_NPWM				4



struct img_pwm_soc_data {

	u32 max_timebase;

};
@@ -66,6 +71,8 @@ struct img_pwm_chip { 
	int		max_period_ns;

	int		min_period_ns;

	const struct img_pwm_soc_data   *data;

	u32		suspend_ctrl_cfg;

	u32		suspend_ch_cfg[IMG_PWM_NPWM];

};



static inline struct img_pwm_chip *to_img_pwm_chip(struct pwm_chip *chip)
@@ -92,6 +99,7 @@ static int img_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 
	unsigned long mul, output_clk_hz, input_clk_hz;

	struct img_pwm_chip *pwm_chip = to_img_pwm_chip(chip);

	unsigned int max_timebase = pwm_chip->data->max_timebase;

	int ret;



	if (period_ns < pwm_chip->min_period_ns ||

	    period_ns > pwm_chip->max_period_ns) {
@@ -123,6 +131,10 @@ static int img_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 


	duty = DIV_ROUND_UP(timebase * duty_ns, period_ns);



	ret = pm_runtime_get_sync(chip->dev);

	if (ret < 0)

		return ret;



	val = img_pwm_readl(pwm_chip, PWM_CTRL_CFG);

	val &= ~(PWM_CTRL_CFG_DIV_MASK << PWM_CTRL_CFG_DIV_SHIFT(pwm->hwpwm));

	val |= (div & PWM_CTRL_CFG_DIV_MASK) <<
@@ -133,6 +145,9 @@ static int img_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 
	      (timebase << PWM_CH_CFG_TMBASE_SHIFT);

	img_pwm_writel(pwm_chip, PWM_CH_CFG(pwm->hwpwm), val);



	pm_runtime_mark_last_busy(chip->dev);

	pm_runtime_put_autosuspend(chip->dev);



	return 0;

}
@@ -140,6 +155,11 @@ static int img_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) 
{

	u32 val;

	struct img_pwm_chip *pwm_chip = to_img_pwm_chip(chip);

	int ret;



	ret = pm_runtime_get_sync(chip->dev);

	if (ret < 0)

		return ret;



	val = img_pwm_readl(pwm_chip, PWM_CTRL_CFG);

	val |= BIT(pwm->hwpwm);
@@ -160,6 +180,9 @@ static void img_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) 
	val = img_pwm_readl(pwm_chip, PWM_CTRL_CFG);

	val &= ~BIT(pwm->hwpwm);

	img_pwm_writel(pwm_chip, PWM_CTRL_CFG, val);



	pm_runtime_mark_last_busy(chip->dev);

	pm_runtime_put_autosuspend(chip->dev);

}



static const struct pwm_ops img_pwm_ops = {
@@ -182,6 +205,37 @@ static const struct of_device_id img_pwm_of_match[] = { 
};

MODULE_DEVICE_TABLE(of, img_pwm_of_match);



static int img_pwm_runtime_suspend(struct device *dev)

{

	struct img_pwm_chip *pwm_chip = dev_get_drvdata(dev);



	clk_disable_unprepare(pwm_chip->pwm_clk);

	clk_disable_unprepare(pwm_chip->sys_clk);



	return 0;

}



static int img_pwm_runtime_resume(struct device *dev)

{

	struct img_pwm_chip *pwm_chip = dev_get_drvdata(dev);

	int ret;



	ret = clk_prepare_enable(pwm_chip->sys_clk);

	if (ret < 0) {

		dev_err(dev, "could not prepare or enable sys clock\n");

		return ret;

	}



	ret = clk_prepare_enable(pwm_chip->pwm_clk);

	if (ret < 0) {

		dev_err(dev, "could not prepare or enable pwm clock\n");

		clk_disable_unprepare(pwm_chip->sys_clk);

		return ret;

	}



	return 0;

}



static int img_pwm_probe(struct platform_device *pdev)

{

	int ret;
@@ -224,23 +278,20 @@ static int img_pwm_probe(struct platform_device *pdev) 
		return PTR_ERR(pwm->pwm_clk);

	}



	ret = clk_prepare_enable(pwm->sys_clk);

	if (ret < 0) {

		dev_err(&pdev->dev, "could not prepare or enable sys clock\n");

		return ret;

	}



	ret = clk_prepare_enable(pwm->pwm_clk);

	if (ret < 0) {

		dev_err(&pdev->dev, "could not prepare or enable pwm clock\n");

		goto disable_sysclk;

	pm_runtime_set_autosuspend_delay(&pdev->dev, IMG_PWM_PM_TIMEOUT);

	pm_runtime_use_autosuspend(&pdev->dev);

	pm_runtime_enable(&pdev->dev);

	if (!pm_runtime_enabled(&pdev->dev)) {

		ret = img_pwm_runtime_resume(&pdev->dev);

		if (ret)

			goto err_pm_disable;

	}



	clk_rate = clk_get_rate(pwm->pwm_clk);

	if (!clk_rate) {

		dev_err(&pdev->dev, "pwm clock has no frequency\n");

		ret = -EINVAL;

		goto disable_pwmclk;

		goto err_suspend;

	}



	/* The maximum input clock divider is 512 */
@@ -255,21 +306,23 @@ static int img_pwm_probe(struct platform_device *pdev) 
	pwm->chip.dev = &pdev->dev;

	pwm->chip.ops = &img_pwm_ops;

	pwm->chip.base = -1;

	pwm->chip.npwm = 4;

	pwm->chip.npwm = IMG_PWM_NPWM;



	ret = pwmchip_add(&pwm->chip);

	if (ret < 0) {

		dev_err(&pdev->dev, "pwmchip_add failed: %d\n", ret);

		goto disable_pwmclk;

		goto err_suspend;

	}



	platform_set_drvdata(pdev, pwm);

	return 0;



disable_pwmclk:

	clk_disable_unprepare(pwm->pwm_clk);

disable_sysclk:

	clk_disable_unprepare(pwm->sys_clk);

err_suspend:

	if (!pm_runtime_enabled(&pdev->dev))

		img_pwm_runtime_suspend(&pdev->dev);

err_pm_disable:

	pm_runtime_disable(&pdev->dev);

	pm_runtime_dont_use_autosuspend(&pdev->dev);

	return ret;

}
@@ -278,6 +331,11 @@ static int img_pwm_remove(struct platform_device *pdev) 
	struct img_pwm_chip *pwm_chip = platform_get_drvdata(pdev);

	u32 val;

	unsigned int i;

	int ret;



	ret = pm_runtime_get_sync(&pdev->dev);

	if (ret < 0)

		return ret;



	for (i = 0; i < pwm_chip->chip.npwm; i++) {

		val = img_pwm_readl(pwm_chip, PWM_CTRL_CFG);
@@ -285,15 +343,79 @@ static int img_pwm_remove(struct platform_device *pdev) 
		img_pwm_writel(pwm_chip, PWM_CTRL_CFG, val);

	}



	clk_disable_unprepare(pwm_chip->pwm_clk);

	clk_disable_unprepare(pwm_chip->sys_clk);

	pm_runtime_put(&pdev->dev);

	pm_runtime_disable(&pdev->dev);

	if (!pm_runtime_status_suspended(&pdev->dev))

		img_pwm_runtime_suspend(&pdev->dev);



	return pwmchip_remove(&pwm_chip->chip);

}



#ifdef CONFIG_PM_SLEEP

static int img_pwm_suspend(struct device *dev)

{

	struct img_pwm_chip *pwm_chip = dev_get_drvdata(dev);

	int i, ret;



	if (pm_runtime_status_suspended(dev)) {

		ret = img_pwm_runtime_resume(dev);

		if (ret)

			return ret;

	}



	for (i = 0; i < pwm_chip->chip.npwm; i++)

		pwm_chip->suspend_ch_cfg[i] = img_pwm_readl(pwm_chip,

							    PWM_CH_CFG(i));



	pwm_chip->suspend_ctrl_cfg = img_pwm_readl(pwm_chip, PWM_CTRL_CFG);



	img_pwm_runtime_suspend(dev);



	return 0;

}



static int img_pwm_resume(struct device *dev)

{

	struct img_pwm_chip *pwm_chip = dev_get_drvdata(dev);

	int ret;

	int i;



	ret = img_pwm_runtime_resume(dev);

	if (ret)

		return ret;



	for (i = 0; i < pwm_chip->chip.npwm; i++)

		img_pwm_writel(pwm_chip, PWM_CH_CFG(i),

			       pwm_chip->suspend_ch_cfg[i]);



	img_pwm_writel(pwm_chip, PWM_CTRL_CFG, pwm_chip->suspend_ctrl_cfg);



	for (i = 0; i < pwm_chip->chip.npwm; i++)

		if (pwm_chip->suspend_ctrl_cfg & BIT(i))

			regmap_update_bits(pwm_chip->periph_regs,

					   PERIP_PWM_PDM_CONTROL,

					   PERIP_PWM_PDM_CONTROL_CH_MASK <<

					   PERIP_PWM_PDM_CONTROL_CH_SHIFT(i),

					   0);



	if (pm_runtime_status_suspended(dev))

		img_pwm_runtime_suspend(dev);



	return 0;

}

#endif /* CONFIG_PM */



static const struct dev_pm_ops img_pwm_pm_ops = {

	SET_RUNTIME_PM_OPS(img_pwm_runtime_suspend,

			   img_pwm_runtime_resume,

			   NULL)

	SET_SYSTEM_SLEEP_PM_OPS(img_pwm_suspend, img_pwm_resume)

};



static struct platform_driver img_pwm_driver = {

	.driver = {

		.name = "img-pwm",

		.pm = &img_pwm_pm_ops,

		.of_match_table = img_pwm_of_match,

	},

	.probe = img_pwm_probe,

drivers/pwm/pwm-mediatek.c

+44 −9
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <linux/module.h>

#include <linux/clk.h>

#include <linux/of.h>

#include <linux/of_device.h>

#include <linux/platform_device.h>

#include <linux/pwm.h>

#include <linux/slab.h>
@@ -40,11 +41,19 @@ enum { 
	MTK_CLK_PWM3,

	MTK_CLK_PWM4,

	MTK_CLK_PWM5,

	MTK_CLK_PWM6,

	MTK_CLK_PWM7,

	MTK_CLK_PWM8,

	MTK_CLK_MAX,

};



static const char * const mtk_pwm_clk_name[] = {

	"main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5"

static const char * const mtk_pwm_clk_name[MTK_CLK_MAX] = {

	"main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6", "pwm7",

	"pwm8"

};



struct mtk_pwm_platform_data {

	unsigned int num_pwms;

};



/**
@@ -59,6 +68,10 @@ struct mtk_pwm_chip { 
	struct clk *clks[MTK_CLK_MAX];

};



static const unsigned int mtk_pwm_reg_offset[] = {

	0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220

};



static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)

{

	return container_of(chip, struct mtk_pwm_chip, chip);
@@ -103,14 +116,14 @@ static void mtk_pwm_clk_disable(struct pwm_chip *chip, struct pwm_device *pwm) 
static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,

				unsigned int offset)

{

	return readl(chip->regs + 0x10 + (num * 0x40) + offset);

	return readl(chip->regs + mtk_pwm_reg_offset[num] + offset);

}



static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,

				  unsigned int num, unsigned int offset,

				  u32 value)

{

	writel(value, chip->regs + 0x10 + (num * 0x40) + offset);

	writel(value, chip->regs + mtk_pwm_reg_offset[num] + offset);

}



static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
@@ -185,6 +198,7 @@ static const struct pwm_ops mtk_pwm_ops = { 


static int mtk_pwm_probe(struct platform_device *pdev)

{

	const struct mtk_pwm_platform_data *data;

	struct mtk_pwm_chip *pc;

	struct resource *res;

	unsigned int i;
@@ -194,23 +208,30 @@ static int mtk_pwm_probe(struct platform_device *pdev) 
	if (!pc)

		return -ENOMEM;



	data = of_device_get_match_data(&pdev->dev);

	if (data == NULL)

		return -EINVAL;



	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	pc->regs = devm_ioremap_resource(&pdev->dev, res);

	if (IS_ERR(pc->regs))

		return PTR_ERR(pc->regs);



	for (i = 0; i < MTK_CLK_MAX; i++) {

	for (i = 0; i < data->num_pwms + 2; i++) {

		pc->clks[i] = devm_clk_get(&pdev->dev, mtk_pwm_clk_name[i]);

		if (IS_ERR(pc->clks[i]))

		if (IS_ERR(pc->clks[i])) {

			dev_err(&pdev->dev, "clock: %s fail: %ld\n",

				mtk_pwm_clk_name[i], PTR_ERR(pc->clks[i]));

			return PTR_ERR(pc->clks[i]);

		}

	}



	platform_set_drvdata(pdev, pc);



	pc->chip.dev = &pdev->dev;

	pc->chip.ops = &mtk_pwm_ops;

	pc->chip.base = -1;

	pc->chip.npwm = 5;

	pc->chip.npwm = data->num_pwms;



	ret = pwmchip_add(&pc->chip);

	if (ret < 0) {
@@ -228,9 +249,23 @@ static int mtk_pwm_remove(struct platform_device *pdev) 
	return pwmchip_remove(&pc->chip);

}



static const struct mtk_pwm_platform_data mt2712_pwm_data = {

	.num_pwms = 8,

};



static const struct mtk_pwm_platform_data mt7622_pwm_data = {

	.num_pwms = 6,

};



static const struct mtk_pwm_platform_data mt7623_pwm_data = {

	.num_pwms = 5,

};



static const struct of_device_id mtk_pwm_of_match[] = {

	{ .compatible = "mediatek,mt7623-pwm" },

	{ }

	{ .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data },

	{ .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data },

	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },

	{ },

};

MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);

drivers/pwm/pwm-stm32-lp.c

+1 −2
Original line number Diff line number Diff line
@@ -219,7 +219,6 @@ static int stm32_pwm_lp_remove(struct platform_device *pdev) 
	unsigned int i;



	for (i = 0; i < priv->chip.npwm; i++)

		if (pwm_is_enabled(&priv->chip.pwms[i]))

		pwm_disable(&priv->chip.pwms[i]);



	return pwmchip_remove(&priv->chip);

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