drm/amdgpu: switch driver from bo->resv to bo->base.resv (5a5011a7) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

+4 −4

Original line number	Diff line number	Diff line
		@@ -218,7 +218,7 @@ void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo)
		static int amdgpu_amdkfd_remove_eviction_fence(struct amdgpu_bo *bo,
		struct amdgpu_amdkfd_fence *ef)
		{
		struct reservation_object *resv = bo->tbo.resv;
		struct reservation_object *resv = bo->tbo.base.resv;
		struct reservation_object_list old, new;
		unsigned int i, j, k;

		@@ -812,7 +812,7 @@ static int process_sync_pds_resv(struct amdkfd_process_info *process_info,
		struct amdgpu_bo *pd = peer_vm->root.base.bo;

		ret = amdgpu_sync_resv(NULL,
		sync, pd->tbo.resv,
		sync, pd->tbo.base.resv,
		AMDGPU_FENCE_OWNER_KFD, false);
		if (ret)
		return ret;
		@@ -887,7 +887,7 @@ static int init_kfd_vm(struct amdgpu_vm vm, void *process_info,
		AMDGPU_FENCE_OWNER_KFD, false);
		if (ret)
		goto wait_pd_fail;
		ret = reservation_object_reserve_shared(vm->root.base.bo->tbo.resv, 1);
		ret = reservation_object_reserve_shared(vm->root.base.bo->tbo.base.resv, 1);
		if (ret)
		goto reserve_shared_fail;
		amdgpu_bo_fence(vm->root.base.bo,
		@@ -2132,7 +2132,7 @@ int amdgpu_amdkfd_add_gws_to_process(void info, void gws, struct kgd_mem **mem
		* Add process eviction fence to bo so they can
		* evict each other.
		*/
		ret = reservation_object_reserve_shared(gws_bo->tbo.resv, 1);
		ret = reservation_object_reserve_shared(gws_bo->tbo.base.resv, 1);
		if (ret)
		goto reserve_shared_fail;
		amdgpu_bo_fence(gws_bo, &process_info->eviction_fence->base, true);

+3 −3

Original line number	Diff line number	Diff line
		@@ -402,7 +402,7 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
		struct ttm_operation_ctx ctx = {
		.interruptible = true,
		.no_wait_gpu = false,
		.resv = bo->tbo.resv,
		.resv = bo->tbo.base.resv,
		.flags = 0
		};
		uint32_t domain;
		@@ -730,7 +730,7 @@ static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p)

		list_for_each_entry(e, &p->validated, tv.head) {
		struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
		struct reservation_object *resv = bo->tbo.resv;
		struct reservation_object *resv = bo->tbo.base.resv;

		r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, p->filp,
		amdgpu_bo_explicit_sync(bo));
		@@ -1729,7 +1729,7 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
		*map = mapping;

		/* Double check that the BO is reserved by this CS */
		if (reservation_object_locking_ctx((*bo)->tbo.resv) != &parser->ticket)
		if (reservation_object_locking_ctx((*bo)->tbo.base.resv) != &parser->ticket)
		return -EINVAL;

		if (!((*bo)->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)) {

+1 −1

Original line number	Diff line number	Diff line
		@@ -204,7 +204,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
		goto unpin;
		}

		r = reservation_object_get_fences_rcu(new_abo->tbo.resv, &work->excl,
		r = reservation_object_get_fences_rcu(new_abo->tbo.base.resv, &work->excl,
		&work->shared_count,
		&work->shared);
		if (unlikely(r != 0)) {

+1 −1

Original line number	Diff line number	Diff line
		@@ -216,7 +216,7 @@ static int amdgpu_dma_buf_map_attach(struct dma_buf *dma_buf,
		* fences on the reservation object into a single exclusive
		* fence.
		*/
		r = __reservation_object_make_exclusive(bo->tbo.resv);
		r = __reservation_object_make_exclusive(bo->tbo.base.resv);
		if (r)
		goto error_unreserve;
		}

+3 −3

Original line number	Diff line number	Diff line
		@@ -134,7 +134,7 @@ int amdgpu_gem_object_open(struct drm_gem_object *obj,
		return -EPERM;

		if (abo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID &&
		abo->tbo.resv != vm->root.base.bo->tbo.resv)
		abo->tbo.base.resv != vm->root.base.bo->tbo.base.resv)
		return -EPERM;

		r = amdgpu_bo_reserve(abo, false);
		@@ -252,7 +252,7 @@ int amdgpu_gem_create_ioctl(struct drm_device dev, void data,
		if (r)
		return r;

		resv = vm->root.base.bo->tbo.resv;
		resv = vm->root.base.bo->tbo.base.resv;
		}

		r = amdgpu_gem_object_create(adev, size, args->in.alignment,
		@@ -433,7 +433,7 @@ int amdgpu_gem_wait_idle_ioctl(struct drm_device dev, void data,
		return -ENOENT;
		}
		robj = gem_to_amdgpu_bo(gobj);
		ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true,
		ret = reservation_object_wait_timeout_rcu(robj->tbo.base.resv, true, true,
		timeout);

		/* ret == 0 means not signaled,