arm64: dts: allwinner: a64: Add thermal sensors and thermal zones (59f5e9b9) · Commits · 戴 / test

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

+42 −0

Original line number	Diff line number	Diff line
		@@ -10,6 +10,7 @@
		#include <dt-bindings/reset/sun50i-a64-ccu.h>
		#include <dt-bindings/reset/sun8i-de2.h>
		#include <dt-bindings/reset/sun8i-r-ccu.h>
		#include <dt-bindings/thermal/thermal.h>

		/ {
		interrupt-parent = <&gic>;
		@@ -172,6 +173,29 @@
		(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_HIGH)>;
		};

		thermal-zones {
		cpu_thermal: cpu0-thermal {
		/* milliseconds */
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&ths 0>;
		};

		gpu0_thermal: gpu0-thermal {
		/* milliseconds */
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&ths 1>;
		};

		gpu1_thermal: gpu1-thermal {
		/* milliseconds */
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&ths 2>;
		};
		};

		soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		@@ -446,6 +470,12 @@
		sid: eeprom@1c14000 {
		compatible = "allwinner,sun50i-a64-sid";
		reg = <0x1c14000 0x400>;
		#address-cells = <1>;
		#size-cells = <1>;

		ths_calibration: thermal-sensor-calibration@34 {
		reg = <0x34 0x8>;
		};
		};

		crypto: crypto@1c15000 {
		@@ -771,6 +801,18 @@
		status = "disabled";
		};

		ths: thermal-sensor@1c25000 {
		compatible = "allwinner,sun50i-a64-ths";
		reg = <0x01c25000 0x100>;
		clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
		clock-names = "bus", "mod";
		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
		resets = <&ccu RST_BUS_THS>;
		nvmem-cells = <&ths_calibration>;
		nvmem-cell-names = "calibration";
		#thermal-sensor-cells = <1>;
		};

		uart0: serial@1c28000 {
		compatible = "snps,dw-apb-uart";
		reg = <0x01c28000 0x400>;