Commit 596419af authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/8xx: Move DataStoreTLBMiss perf handler 



Move DataStoreTLBMiss perf handler in order to cope
with future growing exception prolog.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/75dd28b04efd2cbdbf01153173d99c11cdff2f08.1576916812.git.christophe.leroy@c-s.fr
parent 9260f76a

arch/powerpc/kernel/head_8xx.S

+12 −12
Original line number Diff line number Diff line
@@ -166,18 +166,6 @@ SystemCall: 
 */

	EXCEPTION(0x1000, SoftEmu, program_check_exception, EXC_XFER_STD)



/* Called from DataStoreTLBMiss when perf TLB misses events are activated */

#ifdef CONFIG_PERF_EVENTS

	patch_site	0f, patch__dtlbmiss_perf

0:	lwz	r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)

	addi	r10, r10, 1

	stw	r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)

	mfspr	r10, SPRN_DAR

	mtspr	SPRN_DAR, r11	/* Tag DAR */

	mfspr	r11, SPRN_M_TW

	rfi

#endif



	. = 0x1100

/*

 * For the MPC8xx, this is a software tablewalk to load the instruction
@@ -486,6 +474,18 @@ DARFixed:/* Return from dcbx instruction bug workaround */ 
	/* 0x300 is DataAccess exception, needed by bad_page_fault() */

	EXC_XFER_LITE(0x300, handle_page_fault)



/* Called from DataStoreTLBMiss when perf TLB misses events are activated */

#ifdef CONFIG_PERF_EVENTS

	patch_site	0f, patch__dtlbmiss_perf

0:	lwz	r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)

	addi	r10, r10, 1

	stw	r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)

	mfspr	r10, SPRN_DAR

	mtspr	SPRN_DAR, r11	/* Tag DAR */

	mfspr	r11, SPRN_M_TW

	rfi

#endif



/* On the MPC8xx, these next four traps are used for development

 * support of breakpoints and such.  Someday I will get around to

 * using them.

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