Commit 59390282 authored by Vincent Knecht's avatar Vincent Knecht Committed by Stephen Boyd
Browse files

clk: qcom: smd: Add support for MSM8936 rpm clocks 



Add missing definition of rpm clk for msm8936 soc (also used by msm8939)

Signed-off-by: default avatarVincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20200613072745.1249003-2-vincent.knecht@mailoo.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent f2de5257

drivers/clk/qcom/clk-smd-rpm.c

+50 −0
Original line number Diff line number Diff line
@@ -452,6 +452,55 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8916 = { 
	.num_clks = ARRAY_SIZE(msm8916_clks),

};



/* msm8936 */

DEFINE_CLK_SMD_RPM(msm8936, pcnoc_clk, pcnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0);

DEFINE_CLK_SMD_RPM(msm8936, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);

DEFINE_CLK_SMD_RPM(msm8936, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0);

DEFINE_CLK_SMD_RPM(msm8936, sysmmnoc_clk, sysmmnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);

DEFINE_CLK_SMD_RPM_QDSS(msm8936, qdss_clk, qdss_a_clk, QCOM_SMD_RPM_MISC_CLK, 1);

DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8936, bb_clk1, bb_clk1_a, 1);

DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8936, bb_clk2, bb_clk2_a, 2);

DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8936, rf_clk1, rf_clk1_a, 4);

DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8936, rf_clk2, rf_clk2_a, 5);

DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8936, bb_clk1_pin, bb_clk1_a_pin, 1);

DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8936, bb_clk2_pin, bb_clk2_a_pin, 2);

DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8936, rf_clk1_pin, rf_clk1_a_pin, 4);

DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8936, rf_clk2_pin, rf_clk2_a_pin, 5);



static struct clk_smd_rpm *msm8936_clks[] = {

	[RPM_SMD_PCNOC_CLK]		= &msm8936_pcnoc_clk,

	[RPM_SMD_PCNOC_A_CLK]		= &msm8936_pcnoc_a_clk,

	[RPM_SMD_SNOC_CLK]		= &msm8936_snoc_clk,

	[RPM_SMD_SNOC_A_CLK]		= &msm8936_snoc_a_clk,

	[RPM_SMD_BIMC_CLK]		= &msm8936_bimc_clk,

	[RPM_SMD_BIMC_A_CLK]		= &msm8936_bimc_a_clk,

	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_sysmmnoc_clk,

	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_sysmmnoc_a_clk,

	[RPM_SMD_QDSS_CLK]		= &msm8936_qdss_clk,

	[RPM_SMD_QDSS_A_CLK]		= &msm8936_qdss_a_clk,

	[RPM_SMD_BB_CLK1]		= &msm8936_bb_clk1,

	[RPM_SMD_BB_CLK1_A]		= &msm8936_bb_clk1_a,

	[RPM_SMD_BB_CLK2]		= &msm8936_bb_clk2,

	[RPM_SMD_BB_CLK2_A]		= &msm8936_bb_clk2_a,

	[RPM_SMD_RF_CLK1]		= &msm8936_rf_clk1,

	[RPM_SMD_RF_CLK1_A]		= &msm8936_rf_clk1_a,

	[RPM_SMD_RF_CLK2]		= &msm8936_rf_clk2,

	[RPM_SMD_RF_CLK2_A]		= &msm8936_rf_clk2_a,

	[RPM_SMD_BB_CLK1_PIN]		= &msm8936_bb_clk1_pin,

	[RPM_SMD_BB_CLK1_A_PIN]		= &msm8936_bb_clk1_a_pin,

	[RPM_SMD_BB_CLK2_PIN]		= &msm8936_bb_clk2_pin,

	[RPM_SMD_BB_CLK2_A_PIN]		= &msm8936_bb_clk2_a_pin,

	[RPM_SMD_RF_CLK1_PIN]		= &msm8936_rf_clk1_pin,

	[RPM_SMD_RF_CLK1_A_PIN]		= &msm8936_rf_clk1_a_pin,

	[RPM_SMD_RF_CLK2_PIN]		= &msm8936_rf_clk2_pin,

	[RPM_SMD_RF_CLK2_A_PIN]		= &msm8936_rf_clk2_a_pin,

};



static const struct rpm_smd_clk_desc rpm_clk_msm8936 = {

		.clks = msm8936_clks,

		.num_clks = ARRAY_SIZE(msm8936_clks),

};



/* msm8974 */

DEFINE_CLK_SMD_RPM(msm8974, pnoc_clk, pnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0);

DEFINE_CLK_SMD_RPM(msm8974, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
@@ -843,6 +892,7 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { 


static const struct of_device_id rpm_smd_clk_match_table[] = {

	{ .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },

	{ .compatible = "qcom,rpmcc-msm8936", .data = &rpm_clk_msm8936 },

	{ .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },

	{ .compatible = "qcom,rpmcc-msm8976", .data = &rpm_clk_msm8976 },

	{ .compatible = "qcom,rpmcc-msm8996", .data = &rpm_clk_msm8996 },

include/dt-bindings/clock/qcom,rpmcc.h

+2 −0
Original line number Diff line number Diff line
@@ -143,5 +143,7 @@ 
#define RPM_SMD_LN_BB_CLK1_A_PIN		97

#define RPM_SMD_LN_BB_CLK2_PIN			98

#define RPM_SMD_LN_BB_CLK2_A_PIN		99

#define RPM_SMD_SYSMMNOC_CLK			100

#define RPM_SMD_SYSMMNOC_A_CLK			101



#endif

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