Commit 58d08319 authored by Jesper Nilsson's avatar Jesper Nilsson Committed by Jesper Nilsson
Browse files

CRIS v32: Add hardware dependent include files and defconfigs for ETRAX FS and ARTPEC-3 chips. 

The header files describe the hardware registers available in both
these chips, note that most of this documentation is automatically
generated from the hardware implementation.
parent 035e111f

arch/cris/artpec_3_defconfig

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Original line number Diff line number Diff line 
#

# Automatically generated make config: don't edit

# Linux kernel version: 2.6.24-rc3

# Mon Dec  3 11:18:54 2007

#

CONFIG_MMU=y

CONFIG_ZONE_DMA=y

CONFIG_RWSEM_GENERIC_SPINLOCK=y

CONFIG_GENERIC_IOMAP=y

# CONFIG_ARCH_HAS_ILOG2_U32 is not set

# CONFIG_ARCH_HAS_ILOG2_U64 is not set

CONFIG_GENERIC_FIND_NEXT_BIT=y

CONFIG_GENERIC_HWEIGHT=y

CONFIG_GENERIC_CALIBRATE_DELAY=y

CONFIG_NO_IOPORT=y

CONFIG_NO_IOMEM=y

CONFIG_FORCE_MAX_ZONEORDER=6

CONFIG_CRIS=y

CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"



#

# General setup

#

CONFIG_EXPERIMENTAL=y

CONFIG_BROKEN_ON_SMP=y

CONFIG_INIT_ENV_ARG_LIMIT=32

CONFIG_LOCALVERSION=""

CONFIG_LOCALVERSION_AUTO=y

# CONFIG_SWAP is not set

# CONFIG_SYSVIPC is not set

# CONFIG_POSIX_MQUEUE is not set

# CONFIG_BSD_PROCESS_ACCT is not set

# CONFIG_TASKSTATS is not set

# CONFIG_USER_NS is not set

# CONFIG_PID_NS is not set

# CONFIG_AUDIT is not set

# CONFIG_IKCONFIG is not set

CONFIG_LOG_BUF_SHIFT=14

# CONFIG_CGROUPS is not set

CONFIG_FAIR_GROUP_SCHED=y

CONFIG_FAIR_USER_SCHED=y

# CONFIG_FAIR_CGROUP_SCHED is not set

CONFIG_SYSFS_DEPRECATED=y

# CONFIG_RELAY is not set

# CONFIG_BLK_DEV_INITRD is not set

# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set

CONFIG_SYSCTL=y

CONFIG_EMBEDDED=y

CONFIG_UID16=y

CONFIG_SYSCTL_SYSCALL=y

# CONFIG_KALLSYMS is not set

# CONFIG_HOTPLUG is not set

CONFIG_PRINTK=y

CONFIG_BUG=y

CONFIG_ELF_CORE=y

CONFIG_BASE_FULL=y

CONFIG_FUTEX=y

CONFIG_ANON_INODES=y

CONFIG_EPOLL=y

CONFIG_SIGNALFD=y

CONFIG_EVENTFD=y

CONFIG_SHMEM=y

CONFIG_VM_EVENT_COUNTERS=y

CONFIG_SLUB_DEBUG=y

# CONFIG_SLAB is not set

CONFIG_SLUB=y

# CONFIG_SLOB is not set

CONFIG_RT_MUTEXES=y

# CONFIG_TINY_SHMEM is not set

CONFIG_BASE_SMALL=0

# CONFIG_MODULES is not set

CONFIG_BLOCK=y

# CONFIG_LBD is not set

# CONFIG_BLK_DEV_IO_TRACE is not set

# CONFIG_LSF is not set

# CONFIG_BLK_DEV_BSG is not set



#

# IO Schedulers

#

CONFIG_IOSCHED_NOOP=y

# CONFIG_IOSCHED_AS is not set

# CONFIG_IOSCHED_DEADLINE is not set

CONFIG_IOSCHED_CFQ=y

# CONFIG_DEFAULT_AS is not set

# CONFIG_DEFAULT_DEADLINE is not set

CONFIG_DEFAULT_CFQ=y

# CONFIG_DEFAULT_NOOP is not set

CONFIG_DEFAULT_IOSCHED="cfq"



#

# General setup

#

CONFIG_BINFMT_ELF=y

# CONFIG_BINFMT_MISC is not set

CONFIG_GENERIC_HARDIRQS=y

CONFIG_ETRAX_CMDLINE="root=/dev/mtdblock3 init=/linuxrc"

# CONFIG_ETRAX_WATCHDOG is not set

CONFIG_ETRAX_FAST_TIMER=y

# CONFIG_ETRAX_KMALLOCED_MODULES is not set

# CONFIG_OOM_REBOOT is not set

CONFIG_PREEMPT_NONE=y

# CONFIG_PREEMPT_VOLUNTARY is not set

# CONFIG_PREEMPT is not set

CONFIG_SELECT_MEMORY_MODEL=y

CONFIG_FLATMEM_MANUAL=y

# CONFIG_DISCONTIGMEM_MANUAL is not set

# CONFIG_SPARSEMEM_MANUAL is not set

CONFIG_FLATMEM=y

CONFIG_FLAT_NODE_MEM_MAP=y

# CONFIG_SPARSEMEM_STATIC is not set

# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set

CONFIG_SPLIT_PTLOCK_CPUS=4

# CONFIG_RESOURCES_64BIT is not set

CONFIG_ZONE_DMA_FLAG=1

CONFIG_BOUNCE=y

CONFIG_VIRT_TO_BUS=y



#

# Hardware setup

#

# CONFIG_ETRAX100LX is not set

# CONFIG_ETRAX100LX_V2 is not set

# CONFIG_SVINTO_SIM is not set

# CONFIG_ETRAXFS is not set

CONFIG_CRIS_MACH_ARTPEC3=y

# CONFIG_ETRAX_VCS_SIM is not set

# CONFIG_ETRAX_ARCH_V10 is not set

CONFIG_ETRAX_ARCH_V32=y

CONFIG_ETRAX_DRAM_SIZE=32

CONFIG_ETRAX_VMEM_SIZE=8

CONFIG_ETRAX_FLASH_BUSWIDTH=2

CONFIG_ETRAX_NANDFLASH_BUSWIDTH=1

CONFIG_ETRAX_FLASH1_SIZE=4

CONFIG_ETRAX_DEBUG_PORT0=y

# CONFIG_ETRAX_DEBUG_PORT1 is not set

# CONFIG_ETRAX_DEBUG_PORT2 is not set

# CONFIG_ETRAX_DEBUG_PORT3 is not set

# CONFIG_ETRAX_DEBUG_PORT_NULL is not set

CONFIG_ETRAX_DRAM_VIRTUAL_BASE=c0000000

CONFIG_ETRAX_SERIAL_PORTS=5

CONFIG_ETRAX_DEF_GIO_PA_OE=1c

CONFIG_ETRAX_DEF_GIO_PA_OUT=00

CONFIG_ETRAX_DEF_GIO_PB_OE=00000

CONFIG_ETRAX_DEF_GIO_PB_OUT=00000

CONFIG_ETRAX_DEF_GIO_PC_OE=00000

CONFIG_ETRAX_DEF_GIO_PC_OUT=00000



#

# Artpec-3 options

#

CONFIG_ETRAX_L2CACHE=y

CONFIG_ETRAX_DDR=y

CONFIG_ETRAX_DDR2_MRS=0

CONFIG_ETRAX_DDR2_TIMING=0

CONFIG_ETRAX_DDR2_CONFIG=0

CONFIG_ETRAX_PIO_CE0_CFG=0

CONFIG_ETRAX_PIO_CE1_CFG=0

CONFIG_ETRAX_PIO_CE2_CFG=0

# CONFIG_CPU_FREQ is not set

# CONFIG_ETRAX_NBR_LED_GRP_ZERO is not set

CONFIG_ETRAX_NBR_LED_GRP_ONE=y

# CONFIG_ETRAX_NBR_LED_GRP_TWO is not set

CONFIG_ETRAX_LED_G_NET0="PA3"

CONFIG_ETRAX_LED_R_NET0="PA4"

CONFIG_ETRAX_V32_LED2G="PA5"

CONFIG_ETRAX_V32_LED2R="PA6"

CONFIG_ETRAX_V32_LED3G="PA7"

CONFIG_ETRAX_V32_LED3R="PA7"



#

# Networking

#

CONFIG_NET=y



#

# Networking options

#

CONFIG_PACKET=y

# CONFIG_PACKET_MMAP is not set

CONFIG_UNIX=y

CONFIG_XFRM=y

# CONFIG_XFRM_USER is not set

# CONFIG_XFRM_SUB_POLICY is not set

# CONFIG_XFRM_MIGRATE is not set

# CONFIG_NET_KEY is not set

CONFIG_INET=y

# CONFIG_IP_MULTICAST is not set

# CONFIG_IP_ADVANCED_ROUTER is not set

CONFIG_IP_FIB_HASH=y

# CONFIG_IP_PNP is not set

# CONFIG_NET_IPIP is not set

# CONFIG_NET_IPGRE is not set

# CONFIG_ARPD is not set

# CONFIG_SYN_COOKIES is not set

# CONFIG_INET_AH is not set

# CONFIG_INET_ESP is not set

# CONFIG_INET_IPCOMP is not set

# CONFIG_INET_XFRM_TUNNEL is not set

# CONFIG_INET_TUNNEL is not set

CONFIG_INET_XFRM_MODE_TRANSPORT=y

CONFIG_INET_XFRM_MODE_TUNNEL=y

CONFIG_INET_XFRM_MODE_BEET=y

# CONFIG_INET_LRO is not set

CONFIG_INET_DIAG=y

CONFIG_INET_TCP_DIAG=y

# CONFIG_TCP_CONG_ADVANCED is not set

CONFIG_TCP_CONG_CUBIC=y

CONFIG_DEFAULT_TCP_CONG="cubic"

# CONFIG_TCP_MD5SIG is not set

# CONFIG_IP_VS is not set

# CONFIG_IPV6 is not set

# CONFIG_INET6_XFRM_TUNNEL is not set

# CONFIG_INET6_TUNNEL is not set

# CONFIG_NETWORK_SECMARK is not set

CONFIG_NETFILTER=y

# CONFIG_NETFILTER_DEBUG is not set



#

# Core Netfilter Configuration

#

# CONFIG_NETFILTER_NETLINK is not set

# CONFIG_NF_CONNTRACK_ENABLED is not set

# CONFIG_NF_CONNTRACK is not set

# CONFIG_NETFILTER_XTABLES is not set



#

# IP: Netfilter Configuration

#

# CONFIG_IP_NF_QUEUE is not set

# CONFIG_IP_NF_IPTABLES is not set

# CONFIG_IP_NF_ARPTABLES is not set

# CONFIG_IP_DCCP is not set

# CONFIG_IP_SCTP is not set

# CONFIG_TIPC is not set

# CONFIG_ATM is not set

# CONFIG_BRIDGE is not set

# CONFIG_VLAN_8021Q is not set

# CONFIG_DECNET is not set

# CONFIG_LLC2 is not set

# CONFIG_IPX is not set

# CONFIG_ATALK is not set

# CONFIG_X25 is not set

# CONFIG_LAPB is not set

# CONFIG_ECONET is not set

# CONFIG_WAN_ROUTER is not set

# CONFIG_NET_SCHED is not set



#

# Network testing

#

# CONFIG_NET_PKTGEN is not set

# CONFIG_HAMRADIO is not set

# CONFIG_IRDA is not set

# CONFIG_BT is not set

# CONFIG_AF_RXRPC is not set



#

# Wireless

#

# CONFIG_CFG80211 is not set

# CONFIG_WIRELESS_EXT is not set

# CONFIG_MAC80211 is not set

# CONFIG_IEEE80211 is not set

# CONFIG_RFKILL is not set

# CONFIG_NET_9P is not set



#

# Drivers for built-in interfaces

#

CONFIG_ETRAX_ETHERNET=y

# CONFIG_ETRAX_IDE is not set

CONFIG_ETRAX_AXISFLASHMAP=y

CONFIG_ETRAX_PTABLE_SECTOR=65536

# CONFIG_ETRAX_I2C is not set

# CONFIG_ETRAX_GPIO is not set

# CONFIG_ETRAX_NO_PHY is not set

# CONFIG_ETRAX_ETHERNET_IFACE0 is not set

# CONFIG_ETRAX_ETHERNET_GBIT is not set

# CONFIG_ETRAXFS_SERIAL is not set

# CONFIG_ETRAX_SYNCHRONOUS_SERIAL is not set

# CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE is not set

# CONFIG_ETRAX_NANDFLASH is not set

# CONFIG_ETRAX_CARDBUS is not set

# CONFIG_ETRAX_IOP_FW_LOAD is not set

# CONFIG_ETRAX_STREAMCOPROC is not set

# CONFIG_ETRAX_SPI_MMC is not set

# CONFIG_ETRAX_SPI_MMC_BOARD is not set

# CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK is not set

CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY=y



#

# Generic Driver Options

#

CONFIG_STANDALONE=y

CONFIG_PREVENT_FIRMWARE_BUILD=y

# CONFIG_SYS_HYPERVISOR is not set

CONFIG_MTD=y

# CONFIG_MTD_DEBUG is not set

CONFIG_MTD_CONCAT=y

CONFIG_MTD_PARTITIONS=y

# CONFIG_MTD_REDBOOT_PARTS is not set

# CONFIG_MTD_CMDLINE_PARTS is not set



#

# User Modules And Translation Layers

#

CONFIG_MTD_CHAR=y

CONFIG_MTD_BLKDEVS=y

CONFIG_MTD_BLOCK=y

# CONFIG_FTL is not set

# CONFIG_NFTL is not set

# CONFIG_INFTL is not set

# CONFIG_RFD_FTL is not set

# CONFIG_SSFDC is not set

# CONFIG_MTD_OOPS is not set



#

# RAM/ROM/Flash chip drivers

#

CONFIG_MTD_CFI=y

CONFIG_MTD_JEDECPROBE=y

CONFIG_MTD_GEN_PROBE=y

# CONFIG_MTD_CFI_ADV_OPTIONS is not set

CONFIG_MTD_MAP_BANK_WIDTH_1=y

CONFIG_MTD_MAP_BANK_WIDTH_2=y

CONFIG_MTD_MAP_BANK_WIDTH_4=y

# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set

# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set

# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set

CONFIG_MTD_CFI_I1=y

CONFIG_MTD_CFI_I2=y

# CONFIG_MTD_CFI_I4 is not set

# CONFIG_MTD_CFI_I8 is not set

# CONFIG_MTD_CFI_INTELEXT is not set

CONFIG_MTD_CFI_AMDSTD=y

# CONFIG_MTD_CFI_STAA is not set

CONFIG_MTD_CFI_UTIL=y

CONFIG_MTD_RAM=y

# CONFIG_MTD_ROM is not set

# CONFIG_MTD_ABSENT is not set



#

# Mapping drivers for chip access

#

CONFIG_MTD_COMPLEX_MAPPINGS=y

# CONFIG_MTD_PHYSMAP is not set

# CONFIG_MTD_PLATRAM is not set



#

# Self-contained MTD device drivers

#

# CONFIG_MTD_SLRAM is not set

# CONFIG_MTD_PHRAM is not set

CONFIG_MTD_MTDRAM=y

CONFIG_MTDRAM_TOTAL_SIZE=0

CONFIG_MTDRAM_ERASE_SIZE=64

CONFIG_MTDRAM_ABS_POS=0x0

# CONFIG_MTD_BLOCK2MTD is not set



#

# Disk-On-Chip Device Drivers

#

# CONFIG_MTD_DOC2000 is not set

# CONFIG_MTD_DOC2001 is not set

# CONFIG_MTD_DOC2001PLUS is not set

# CONFIG_MTD_NAND is not set

# CONFIG_MTD_ONENAND is not set



#

# UBI - Unsorted block images

#

# CONFIG_MTD_UBI is not set

CONFIG_BLK_DEV=y

# CONFIG_BLK_DEV_COW_COMMON is not set

# CONFIG_BLK_DEV_LOOP is not set

# CONFIG_BLK_DEV_NBD is not set

CONFIG_BLK_DEV_RAM=y

CONFIG_BLK_DEV_RAM_COUNT=16

CONFIG_BLK_DEV_RAM_SIZE=4096

CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024

# CONFIG_CDROM_PKTCDVD is not set

# CONFIG_ATA_OVER_ETH is not set

CONFIG_NETDEVICES=y

# CONFIG_NETDEVICES_MULTIQUEUE is not set

# CONFIG_DUMMY is not set

# CONFIG_BONDING is not set

# CONFIG_MACVLAN is not set

# CONFIG_EQUALIZER is not set

# CONFIG_TUN is not set

# CONFIG_VETH is not set

# CONFIG_PHYLIB is not set

CONFIG_NET_ETHERNET=y

CONFIG_MII=y

# CONFIG_IBM_NEW_EMAC_ZMII is not set

# CONFIG_IBM_NEW_EMAC_RGMII is not set

# CONFIG_IBM_NEW_EMAC_TAH is not set

# CONFIG_IBM_NEW_EMAC_EMAC4 is not set

CONFIG_NETDEV_1000=y

CONFIG_NETDEV_10000=y



#

# Wireless LAN

#

# CONFIG_WLAN_PRE80211 is not set

# CONFIG_WLAN_80211 is not set

# CONFIG_WAN is not set

# CONFIG_PPP is not set

# CONFIG_SLIP is not set

# CONFIG_SHAPER is not set

# CONFIG_NETCONSOLE is not set

# CONFIG_NETPOLL is not set

# CONFIG_NET_POLL_CONTROLLER is not set

# CONFIG_RTC_CLASS is not set



#

# Input device support

#

# CONFIG_INPUT is not set



#

# Hardware I/O ports

#

CONFIG_SERIO=y

# CONFIG_SERIO_I8042 is not set

# CONFIG_SERIO_SERPORT is not set

# CONFIG_SERIO_LIBPS2 is not set

# CONFIG_SERIO_RAW is not set

# CONFIG_GAMEPORT is not set



#

# Character devices

#

# CONFIG_VT is not set

CONFIG_UNIX98_PTYS=y

CONFIG_LEGACY_PTYS=y

CONFIG_LEGACY_PTY_COUNT=256

CONFIG_HW_RANDOM=y

# CONFIG_RTC is not set

# CONFIG_GEN_RTC is not set

# CONFIG_R3964 is not set

# CONFIG_RAW_DRIVER is not set



#

# File systems

#

# CONFIG_EXT2_FS is not set

# CONFIG_EXT3_FS is not set

# CONFIG_EXT4DEV_FS is not set

# CONFIG_REISERFS_FS is not set

# CONFIG_JFS_FS is not set

# CONFIG_FS_POSIX_ACL is not set

# CONFIG_XFS_FS is not set

# CONFIG_GFS2_FS is not set

# CONFIG_OCFS2_FS is not set

# CONFIG_MINIX_FS is not set

# CONFIG_ROMFS_FS is not set

CONFIG_INOTIFY=y

CONFIG_INOTIFY_USER=y

# CONFIG_QUOTA is not set

CONFIG_DNOTIFY=y

# CONFIG_AUTOFS_FS is not set

# CONFIG_AUTOFS4_FS is not set

# CONFIG_FUSE_FS is not set



#

# CD-ROM/DVD Filesystems

#

# CONFIG_ISO9660_FS is not set

# CONFIG_UDF_FS is not set



#

# DOS/FAT/NT Filesystems

#

# CONFIG_MSDOS_FS is not set

# CONFIG_VFAT_FS is not set

# CONFIG_NTFS_FS is not set



#

# Pseudo filesystems

#

CONFIG_PROC_FS=y

CONFIG_PROC_KCORE=y

CONFIG_PROC_SYSCTL=y

CONFIG_SYSFS=y

CONFIG_TMPFS=y

# CONFIG_TMPFS_POSIX_ACL is not set

# CONFIG_HUGETLB_PAGE is not set

# CONFIG_CONFIGFS_FS is not set



#

# Miscellaneous filesystems

#

# CONFIG_ADFS_FS is not set

# CONFIG_AFFS_FS is not set

# CONFIG_HFS_FS is not set

# CONFIG_HFSPLUS_FS is not set

# CONFIG_BEFS_FS is not set

# CONFIG_BFS_FS is not set

# CONFIG_EFS_FS is not set

CONFIG_JFFS2_FS=y

CONFIG_JFFS2_FS_DEBUG=0

CONFIG_JFFS2_FS_WRITEBUFFER=y

# CONFIG_JFFS2_FS_WBUF_VERIFY is not set

# CONFIG_JFFS2_SUMMARY is not set

# CONFIG_JFFS2_FS_XATTR is not set

# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set

CONFIG_JFFS2_ZLIB=y

# CONFIG_JFFS2_LZO is not set

CONFIG_JFFS2_RTIME=y

# CONFIG_JFFS2_RUBIN is not set

CONFIG_CRAMFS=y

# CONFIG_VXFS_FS is not set

# CONFIG_HPFS_FS is not set

# CONFIG_QNX4FS_FS is not set

# CONFIG_SYSV_FS is not set

# CONFIG_UFS_FS is not set

CONFIG_NETWORK_FILESYSTEMS=y

CONFIG_NFS_FS=y

CONFIG_NFS_V3=y

# CONFIG_NFS_V3_ACL is not set

# CONFIG_NFS_V4 is not set

# CONFIG_NFS_DIRECTIO is not set

# CONFIG_NFSD is not set

CONFIG_LOCKD=y

CONFIG_LOCKD_V4=y

CONFIG_NFS_COMMON=y

CONFIG_SUNRPC=y

# CONFIG_SUNRPC_BIND34 is not set

# CONFIG_RPCSEC_GSS_KRB5 is not set

# CONFIG_RPCSEC_GSS_SPKM3 is not set

# CONFIG_SMB_FS is not set

# CONFIG_CIFS is not set

# CONFIG_NCP_FS is not set

# CONFIG_CODA_FS is not set

# CONFIG_AFS_FS is not set



#

# Partition Types

#

# CONFIG_PARTITION_ADVANCED is not set

CONFIG_MSDOS_PARTITION=y

# CONFIG_NLS is not set

# CONFIG_DLM is not set



#

# Kernel hacking

#

# CONFIG_PROFILING is not set

# CONFIG_SYSTEM_PROFILER is not set

# CONFIG_PRINTK_TIME is not set

CONFIG_ENABLE_WARN_DEPRECATED=y

CONFIG_ENABLE_MUST_CHECK=y

# CONFIG_MAGIC_SYSRQ is not set

# CONFIG_UNUSED_SYMBOLS is not set

# CONFIG_DEBUG_FS is not set

# CONFIG_HEADERS_CHECK is not set

# CONFIG_DEBUG_KERNEL is not set

# CONFIG_SLUB_DEBUG_ON is not set

# CONFIG_SAMPLES is not set



#

# Security options

#

# CONFIG_KEYS is not set

# CONFIG_SECURITY is not set

# CONFIG_SECURITY_FILE_CAPABILITIES is not set

# CONFIG_CRYPTO is not set



#

# Library routines

#

CONFIG_BITREVERSE=y

# CONFIG_CRC_CCITT is not set

# CONFIG_CRC16 is not set

# CONFIG_CRC_ITU_T is not set

CONFIG_CRC32=y

# CONFIG_CRC7 is not set

# CONFIG_LIBCRC32C is not set

CONFIG_ZLIB_INFLATE=y

CONFIG_ZLIB_DEFLATE=y

CONFIG_PLIST=y

CONFIG_HAS_DMA=y

arch/cris/etraxfs_defconfig

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File added.

Preview size limit exceeded, changes collapsed.

include/asm-cris/arch-v32/mach-a3/arbiter.h

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Original line number Diff line number Diff line 
#ifndef _ASM_CRIS_ARCH_ARBITER_H

#define _ASM_CRIS_ARCH_ARBITER_H



#define EXT_REGION 0

#define INT_REGION 1



typedef void (watch_callback)(void);



enum {

	arbiter_all_dmas = 0x7fe,

	arbiter_cpu = 0x1800,

	arbiter_all_clients = 0x7fff

};



enum {

	arbiter_bar_all_clients = 0x1ff

};



enum {

	arbiter_all_read = 0x55,

	arbiter_all_write = 0xaa,

	arbiter_all_accesses = 0xff

};



#define MARB_CLIENTS(foo_cli, bar_cli) (((bar_cli) << 16) | (foo_cli))



int crisv32_arbiter_allocate_bandwith(int client, int region,

		unsigned long bandwidth);

int crisv32_arbiter_watch(unsigned long start, unsigned long size,

		unsigned long clients, unsigned long accesses,

		watch_callback * cb);

int crisv32_arbiter_unwatch(int id);



#endif

include/asm-cris/arch-v32/mach-a3/dma.h

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Original line number Diff line number Diff line 
#ifndef _ASM_ARCH_CRIS_DMA_H

#define _ASM_ARCH_CRIS_DMA_H



/* Defines for using and allocating dma channels. */



#define MAX_DMA_CHANNELS	12 /* 8 and 10 not used. */



enum dma_owner {

	dma_eth,

	dma_ser0,

	dma_ser1,

	dma_ser2,

	dma_ser3,

	dma_ser4,

	dma_iop,

	dma_sser,

	dma_strp,

	dma_h264,

	dma_jpeg

};



int crisv32_request_dma(unsigned int dmanr, const char *device_id,

	unsigned options, unsigned bandwidth, enum dma_owner owner);

void crisv32_free_dma(unsigned int dmanr);



/* Masks used by crisv32_request_dma options: */

#define DMA_VERBOSE_ON_ERROR 1

#define DMA_PANIC_ON_ERROR (2|DMA_VERBOSE_ON_ERROR)

#define DMA_INT_MEM 4



#endif /* _ASM_ARCH_CRIS_DMA_H */

include/asm-cris/arch-v32/mach-a3/hwregs/asm/clkgen_defs_asm.h

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Original line number Diff line number Diff line 
#ifndef __clkgen_defs_asm_h

#define __clkgen_defs_asm_h



/*

 * This file is autogenerated from

 *   file:           clkgen.r

 *

 *   by ../../../tools/rdesc/bin/rdes2c -asm -outfile clkgen_defs_asm.h clkgen.r

 * Any changes here will be lost.

 *

 * -*- buffer-read-only: t -*-

 */



#ifndef REG_FIELD

#define REG_FIELD( scope, reg, field, value ) \

	REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )

#define REG_FIELD_X_( value, shift ) ((value) << shift)

#endif



#ifndef REG_STATE

#define REG_STATE( scope, reg, field, symbolic_value ) \

	REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )

#define REG_STATE_X_( k, shift ) (k << shift)

#endif



#ifndef REG_MASK

#define REG_MASK( scope, reg, field ) \

	REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )

#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)

#endif



#ifndef REG_LSB

#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb

#endif



#ifndef REG_BIT

#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit

#endif



#ifndef REG_ADDR

#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)

#define REG_ADDR_X_( inst, offs ) ((inst) + offs)

#endif



#ifndef REG_ADDR_VECT

#define REG_ADDR_VECT( scope, inst, reg, index ) \

	REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \

			 STRIDE_##scope##_##reg )

#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \

	((inst) + offs + (index) * stride)

#endif



/* Register r_bootsel, scope clkgen, type r */

#define reg_clkgen_r_bootsel___boot_mode___lsb 0

#define reg_clkgen_r_bootsel___boot_mode___width 5

#define reg_clkgen_r_bootsel___intern_main_clk___lsb 5

#define reg_clkgen_r_bootsel___intern_main_clk___width 1

#define reg_clkgen_r_bootsel___intern_main_clk___bit 5

#define reg_clkgen_r_bootsel___extern_usb2_clk___lsb 6

#define reg_clkgen_r_bootsel___extern_usb2_clk___width 1

#define reg_clkgen_r_bootsel___extern_usb2_clk___bit 6

#define reg_clkgen_r_bootsel_offset 0



/* Register rw_clk_ctrl, scope clkgen, type rw */

#define reg_clkgen_rw_clk_ctrl___pll___lsb 0

#define reg_clkgen_rw_clk_ctrl___pll___width 1

#define reg_clkgen_rw_clk_ctrl___pll___bit 0

#define reg_clkgen_rw_clk_ctrl___cpu___lsb 1

#define reg_clkgen_rw_clk_ctrl___cpu___width 1

#define reg_clkgen_rw_clk_ctrl___cpu___bit 1

#define reg_clkgen_rw_clk_ctrl___iop_usb___lsb 2

#define reg_clkgen_rw_clk_ctrl___iop_usb___width 1

#define reg_clkgen_rw_clk_ctrl___iop_usb___bit 2

#define reg_clkgen_rw_clk_ctrl___vin___lsb 3

#define reg_clkgen_rw_clk_ctrl___vin___width 1

#define reg_clkgen_rw_clk_ctrl___vin___bit 3

#define reg_clkgen_rw_clk_ctrl___sclr___lsb 4

#define reg_clkgen_rw_clk_ctrl___sclr___width 1

#define reg_clkgen_rw_clk_ctrl___sclr___bit 4

#define reg_clkgen_rw_clk_ctrl___h264___lsb 5

#define reg_clkgen_rw_clk_ctrl___h264___width 1

#define reg_clkgen_rw_clk_ctrl___h264___bit 5

#define reg_clkgen_rw_clk_ctrl___ddr2___lsb 6

#define reg_clkgen_rw_clk_ctrl___ddr2___width 1

#define reg_clkgen_rw_clk_ctrl___ddr2___bit 6

#define reg_clkgen_rw_clk_ctrl___vout_hist___lsb 7

#define reg_clkgen_rw_clk_ctrl___vout_hist___width 1

#define reg_clkgen_rw_clk_ctrl___vout_hist___bit 7

#define reg_clkgen_rw_clk_ctrl___eth___lsb 8

#define reg_clkgen_rw_clk_ctrl___eth___width 1

#define reg_clkgen_rw_clk_ctrl___eth___bit 8

#define reg_clkgen_rw_clk_ctrl___ccd_tg_200___lsb 9

#define reg_clkgen_rw_clk_ctrl___ccd_tg_200___width 1

#define reg_clkgen_rw_clk_ctrl___ccd_tg_200___bit 9

#define reg_clkgen_rw_clk_ctrl___dma0_1_eth___lsb 10

#define reg_clkgen_rw_clk_ctrl___dma0_1_eth___width 1

#define reg_clkgen_rw_clk_ctrl___dma0_1_eth___bit 10

#define reg_clkgen_rw_clk_ctrl___ccd_tg_100___lsb 11

#define reg_clkgen_rw_clk_ctrl___ccd_tg_100___width 1

#define reg_clkgen_rw_clk_ctrl___ccd_tg_100___bit 11

#define reg_clkgen_rw_clk_ctrl___jpeg___lsb 12

#define reg_clkgen_rw_clk_ctrl___jpeg___width 1

#define reg_clkgen_rw_clk_ctrl___jpeg___bit 12

#define reg_clkgen_rw_clk_ctrl___sser_ser_dma6_7___lsb 13

#define reg_clkgen_rw_clk_ctrl___sser_ser_dma6_7___width 1

#define reg_clkgen_rw_clk_ctrl___sser_ser_dma6_7___bit 13

#define reg_clkgen_rw_clk_ctrl___strdma0_2_video___lsb 14

#define reg_clkgen_rw_clk_ctrl___strdma0_2_video___width 1

#define reg_clkgen_rw_clk_ctrl___strdma0_2_video___bit 14

#define reg_clkgen_rw_clk_ctrl___dma2_3_strcop___lsb 15

#define reg_clkgen_rw_clk_ctrl___dma2_3_strcop___width 1

#define reg_clkgen_rw_clk_ctrl___dma2_3_strcop___bit 15

#define reg_clkgen_rw_clk_ctrl___dma4_5_iop___lsb 16

#define reg_clkgen_rw_clk_ctrl___dma4_5_iop___width 1

#define reg_clkgen_rw_clk_ctrl___dma4_5_iop___bit 16

#define reg_clkgen_rw_clk_ctrl___dma9_11___lsb 17

#define reg_clkgen_rw_clk_ctrl___dma9_11___width 1

#define reg_clkgen_rw_clk_ctrl___dma9_11___bit 17

#define reg_clkgen_rw_clk_ctrl___memarb_bar_ddr___lsb 18

#define reg_clkgen_rw_clk_ctrl___memarb_bar_ddr___width 1

#define reg_clkgen_rw_clk_ctrl___memarb_bar_ddr___bit 18

#define reg_clkgen_rw_clk_ctrl___sclr_h264___lsb 19

#define reg_clkgen_rw_clk_ctrl___sclr_h264___width 1

#define reg_clkgen_rw_clk_ctrl___sclr_h264___bit 19

#define reg_clkgen_rw_clk_ctrl_offset 4





/* Constants */

#define regk_clkgen_eth1000_rx                    0x0000000c

#define regk_clkgen_eth1000_tx                    0x0000000e

#define regk_clkgen_eth100_rx                     0x0000001d

#define regk_clkgen_eth100_rx_half                0x0000001c

#define regk_clkgen_eth100_tx                     0x0000001f

#define regk_clkgen_eth100_tx_half                0x0000001e

#define regk_clkgen_nand_3_2                      0x00000000

#define regk_clkgen_nand_3_2_0x30                 0x00000002

#define regk_clkgen_nand_3_2_0x30_pll             0x00000012

#define regk_clkgen_nand_3_2_pll                  0x00000010

#define regk_clkgen_nand_3_3                      0x00000001

#define regk_clkgen_nand_3_3_0x30                 0x00000003

#define regk_clkgen_nand_3_3_0x30_pll             0x00000013

#define regk_clkgen_nand_3_3_pll                  0x00000011

#define regk_clkgen_nand_4_2                      0x00000004

#define regk_clkgen_nand_4_2_0x30                 0x00000006

#define regk_clkgen_nand_4_2_0x30_pll             0x00000016

#define regk_clkgen_nand_4_2_pll                  0x00000014

#define regk_clkgen_nand_4_3                      0x00000005

#define regk_clkgen_nand_4_3_0x30                 0x00000007

#define regk_clkgen_nand_4_3_0x30_pll             0x00000017

#define regk_clkgen_nand_4_3_pll                  0x00000015

#define regk_clkgen_nand_5_2                      0x00000008

#define regk_clkgen_nand_5_2_0x30                 0x0000000a

#define regk_clkgen_nand_5_2_0x30_pll             0x0000001a

#define regk_clkgen_nand_5_2_pll                  0x00000018

#define regk_clkgen_nand_5_3                      0x00000009

#define regk_clkgen_nand_5_3_0x30                 0x0000000b

#define regk_clkgen_nand_5_3_0x30_pll             0x0000001b

#define regk_clkgen_nand_5_3_pll                  0x00000019

#define regk_clkgen_no                            0x00000000

#define regk_clkgen_rw_clk_ctrl_default           0x00000002

#define regk_clkgen_ser                           0x0000000d

#define regk_clkgen_ser_pll                       0x0000000f

#define regk_clkgen_yes                           0x00000001

#endif /* __clkgen_defs_asm_h */

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