PCI: support PCIe ARI capability (58c3a727) · Commits · 戴 / test

drivers/pci/pci.c

+32 −0

Original line number	Diff line number	Diff line
		@@ -1299,6 +1299,38 @@ void pci_pm_init(struct pci_dev *dev)
		}
		}

		/**
		* pci_enable_ari - enable ARI forwarding if hardware support it
		* @dev: the PCI device
		*/
		void pci_enable_ari(struct pci_dev *dev)
		{
		int pos;
		u32 cap;
		u16 ctrl;

		if (!dev->is_pcie)
		return;

		if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
		dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)
		return;

		pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
		if (!pos)
		return;

		pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
		if (!(cap & PCI_EXP_DEVCAP2_ARI))
		return;

		pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
		ctrl \|= PCI_EXP_DEVCTL2_ARI;
		pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);

		dev->ari_enabled = 1;
		}

		int
		pci_get_interrupt_pin(struct pci_dev dev, struct pci_dev *bridge)
		{

drivers/pci/pci.h

+12 −0

Original line number	Diff line number	Diff line
		@@ -151,4 +151,16 @@ struct pci_slot_attribute {
		};
		#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)

		extern void pci_enable_ari(struct pci_dev *dev);
		/**
		* pci_ari_enabled - query ARI forwarding status
		* @dev: the PCI device
		*
		* Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
		*/
		static inline int pci_ari_enabled(struct pci_dev *dev)
		{
		return dev->ari_enabled;
		}

		#endif /* DRIVERS_PCI_H */

drivers/pci/probe.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -1025,6 +1025,9 @@ static void pci_init_capabilities(struct pci_dev *dev)

		/* Vital Product Data */
		pci_vpd_pci22_init(dev);

		/* Alternative Routing-ID Forwarding */
		pci_enable_ari(dev);
		}

		void pci_device_add(struct pci_dev dev, struct pci_bus bus)

include/linux/pci.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -214,6 +214,7 @@ struct pci_dev {
		unsigned int broken_parity_status:1; /* Device generates false positive parity */
		unsigned int msi_enabled:1;
		unsigned int msix_enabled:1;
		unsigned int ari_enabled:1; /* ARI forwarding */
		unsigned int is_managed:1;
		unsigned int is_pcie:1;
		pci_dev_flags_t dev_flags;

include/linux/pci_regs.h

+14 −0

Original line number	Diff line number	Diff line
		@@ -419,6 +419,10 @@
		#define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */
		#define PCI_EXP_RTCAP 30 /* Root Capabilities */
		#define PCI_EXP_RTSTA 32 /* Root Status */
		#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
		#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
		#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
		#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */

		/* Extended Capabilities (PCI-X 2.0 and Express) */
		#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
		@@ -429,6 +433,7 @@
		#define PCI_EXT_CAP_ID_VC 2
		#define PCI_EXT_CAP_ID_DSN 3
		#define PCI_EXT_CAP_ID_PWR 4
		#define PCI_EXT_CAP_ID_ARI 14

		/* Advanced Error Reporting */
		#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */
		@@ -536,5 +541,14 @@
		#define HT_CAPTYPE_GEN3 0xD0 /* Generation 3 hypertransport configuration */
		#define HT_CAPTYPE_PM 0xE0 /* Hypertransport powermanagement configuration */

		/* Alternative Routing-ID Interpretation */
		#define PCI_ARI_CAP 0x04 /* ARI Capability Register */
		#define PCI_ARI_CAP_MFVC 0x0001 /* MFVC Function Groups Capability */
		#define PCI_ARI_CAP_ACS 0x0002 /* ACS Function Groups Capability */
		#define PCI_ARI_CAP_NFN(x) (((x) >> 8) & 0xff) /* Next Function Number */
		#define PCI_ARI_CTRL 0x06 /* ARI Control Register */
		#define PCI_ARI_CTRL_MFVC 0x0001 /* MFVC Function Groups Enable */
		#define PCI_ARI_CTRL_ACS 0x0002 /* ACS Function Groups Enable */
		#define PCI_ARI_CTRL_FG(x) (((x) >> 4) & 7) /* Function Group */

		#endif /* LINUX_PCI_REGS_H */

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