Commit 588a4d5c authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
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drm/amd/pm: disable/enable gfx ulv on UMD pstate enter/exit



Add gfx ulv disablement/enablement on UMD pstate entering/exiting.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b109f61e
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+1 −0
Original line number Diff line number Diff line
@@ -596,6 +596,7 @@ struct pptable_funcs {
	int (*set_pp_feature_mask)(struct smu_context *smu, uint64_t new_mask);
	ssize_t (*get_gpu_metrics)(struct smu_context *smu, void **table);
	int (*enable_mgpu_fan_boost)(struct smu_context *smu);
	int (*gfx_ulv_control)(struct smu_context *smu, bool enablement);
};

typedef enum {
+2 −0
Original line number Diff line number Diff line
@@ -1440,6 +1440,7 @@ static int smu_enable_umd_pstate(void *handle,
			amdgpu_device_ip_set_clockgating_state(smu->adev,
							       AMD_IP_BLOCK_TYPE_GFX,
							       AMD_CG_STATE_UNGATE);
			smu_gfx_ulv_control(smu, false);
		}
	} else {
		/* exit umd pstate, restore level, enable gfx cg*/
@@ -1447,6 +1448,7 @@ static int smu_enable_umd_pstate(void *handle,
			if (*level == AMD_DPM_FORCED_LEVEL_PROFILE_EXIT)
				*level = smu_dpm_ctx->saved_dpm_level;
			smu_dpm_ctx->enable_umd_pstate = false;
			smu_gfx_ulv_control(smu, true);
			amdgpu_device_ip_set_clockgating_state(smu->adev,
							       AMD_IP_BLOCK_TYPE_GFX,
							       AMD_CG_STATE_GATE);
+1 −0
Original line number Diff line number Diff line
@@ -92,6 +92,7 @@
#define smu_get_asic_power_limits(smu)					smu_ppt_funcs(get_power_limit, 0, smu)
#define smu_get_pp_feature_mask(smu, buf)				smu_ppt_funcs(get_pp_feature_mask, 0, smu, buf)
#define smu_set_pp_feature_mask(smu, new_mask)				smu_ppt_funcs(set_pp_feature_mask, 0, smu, new_mask)
#define smu_gfx_ulv_control(smu, enablement)				smu_ppt_funcs(gfx_ulv_control, 0, smu, enablement)

#endif
#endif