Commit 5888f07a authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher
Browse files

drm/amd/display: Indicate use of TMZ buffers to DC 



[Why]
Hubp needs to know whether a buffer is being scanned out from the trusted
memory zone or not.

[How]
Check for the TMZ flag on the amdgpu_bo and set the tmz_surface flag in
dc_plane_address accordingly.

Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c6252390

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+23 −6
Original line number Diff line number Diff line
@@ -3309,7 +3309,7 @@ static int fill_dc_scaling_info(const struct drm_plane_state *state, 
}



static int get_fb_info(const struct amdgpu_framebuffer *amdgpu_fb,

		       uint64_t *tiling_flags)

		       uint64_t *tiling_flags, bool *tmz_surface)

{

	struct amdgpu_bo *rbo = gem_to_amdgpu_bo(amdgpu_fb->base.obj[0]);

	int r = amdgpu_bo_reserve(rbo, false);
@@ -3324,6 +3324,9 @@ static int get_fb_info(const struct amdgpu_framebuffer *amdgpu_fb, 
	if (tiling_flags)

		amdgpu_bo_get_tiling_flags(rbo, tiling_flags);



	if (tmz_surface)

		*tmz_surface = amdgpu_bo_encrypted(rbo);



	amdgpu_bo_unreserve(rbo);



	return r;
@@ -3411,6 +3414,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev, 
			     struct plane_size *plane_size,

			     struct dc_plane_dcc_param *dcc,

			     struct dc_plane_address *address,

			     bool tmz_surface,

			     bool force_disable_dcc)

{

	const struct drm_framebuffer *fb = &afb->base;
@@ -3421,6 +3425,8 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev, 
	memset(dcc, 0, sizeof(*dcc));

	memset(address, 0, sizeof(*address));



	address->tmz_surface = tmz_surface;



	if (format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) {

		plane_size->surface_size.x = 0;

		plane_size->surface_size.y = 0;
@@ -3611,6 +3617,7 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev, 
			    const uint64_t tiling_flags,

			    struct dc_plane_info *plane_info,

			    struct dc_plane_address *address,

			    bool tmz_surface,

			    bool force_disable_dcc)

{

	const struct drm_framebuffer *fb = plane_state->fb;
@@ -3693,7 +3700,7 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev, 
					   plane_info->rotation, tiling_flags,

					   &plane_info->tiling_info,

					   &plane_info->plane_size,

					   &plane_info->dcc, address,

					   &plane_info->dcc, address, tmz_surface,

					   force_disable_dcc);

	if (ret)

		return ret;
@@ -3717,6 +3724,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev, 
	struct dc_plane_info plane_info;

	uint64_t tiling_flags;

	int ret;

	bool tmz_surface = false;

	bool force_disable_dcc = false;



	ret = fill_dc_scaling_info(plane_state, &scaling_info);
@@ -3728,7 +3736,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev, 
	dc_plane_state->clip_rect = scaling_info.clip_rect;

	dc_plane_state->scaling_quality = scaling_info.scaling_quality;



	ret = get_fb_info(amdgpu_fb, &tiling_flags);

	ret = get_fb_info(amdgpu_fb, &tiling_flags, &tmz_surface);

	if (ret)

		return ret;
@@ -3736,6 +3744,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev, 
	ret = fill_dc_plane_info_and_addr(adev, plane_state, tiling_flags,

					  &plane_info,

					  &dc_plane_state->address,

					  tmz_surface,

					  force_disable_dcc);

	if (ret)

		return ret;
@@ -5354,6 +5363,7 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, 
	uint64_t tiling_flags;

	uint32_t domain;

	int r;

	bool tmz_surface = false;

	bool force_disable_dcc = false;



	dm_plane_state_old = to_dm_plane_state(plane->state);
@@ -5403,6 +5413,8 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, 


	amdgpu_bo_get_tiling_flags(rbo, &tiling_flags);



	tmz_surface = amdgpu_bo_encrypted(rbo);



	ttm_eu_backoff_reservation(&ticket, &list);



	afb->address = amdgpu_bo_gpu_offset(rbo);
@@ -5418,7 +5430,7 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, 
			adev, afb, plane_state->format, plane_state->rotation,

			tiling_flags, &plane_state->tiling_info,

			&plane_state->plane_size, &plane_state->dcc,

			&plane_state->address,

			&plane_state->address, tmz_surface,

			force_disable_dcc);

	}
@@ -6592,6 +6604,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
	unsigned long flags;

	struct amdgpu_bo *abo;

	uint64_t tiling_flags;

	bool tmz_surface = false;

	uint32_t target_vblank, last_flip_vblank;

	bool vrr_active = amdgpu_dm_vrr_active(acrtc_state);

	bool pflip_present = false;
@@ -6687,12 +6700,15 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 


		amdgpu_bo_get_tiling_flags(abo, &tiling_flags);



		tmz_surface = amdgpu_bo_encrypted(abo);



		amdgpu_bo_unreserve(abo);



		fill_dc_plane_info_and_addr(

			dm->adev, new_plane_state, tiling_flags,

			&bundle->plane_infos[planes_count],

			&bundle->flip_addrs[planes_count].address,

			tmz_surface,

			false);



		DRM_DEBUG_DRIVER("plane: id=%d dcc_en=%d\n",
@@ -8065,6 +8081,7 @@ dm_determine_update_type_for_commit(struct amdgpu_display_manager *dm, 
			struct dc_flip_addrs *flip_addr = &bundle->flip_addrs[num_plane];

			struct dc_scaling_info *scaling_info = &bundle->scaling_infos[num_plane];

			uint64_t tiling_flags;

			bool tmz_surface = false;



			new_plane_crtc = new_plane_state->crtc;

			new_dm_plane_state = to_dm_plane_state(new_plane_state);
@@ -8112,14 +8129,14 @@ dm_determine_update_type_for_commit(struct amdgpu_display_manager *dm, 
			bundle->surface_updates[num_plane].scaling_info = scaling_info;



			if (amdgpu_fb) {

				ret = get_fb_info(amdgpu_fb, &tiling_flags);

				ret = get_fb_info(amdgpu_fb, &tiling_flags, &tmz_surface);

				if (ret)

					goto cleanup;



				ret = fill_dc_plane_info_and_addr(

					dm->adev, new_plane_state, tiling_flags,

					plane_info,

					&flip_addr->address,

					&flip_addr->address, tmz_surface,

					false);

				if (ret)

					goto cleanup;

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