Commit 586a07dc authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branch 'pm-cpufreq' 

* pm-cpufreq:
  cpufreq: Avoid calling cpufreq_verify_current_freq() from handle_update()
  cpufreq: Consolidate cpufreq_update_current_freq() and __cpufreq_get()
  cpufreq: Don't skip frequency validation for has_target() drivers
  cpufreq: Use has_target() instead of !setpolicy
  cpufreq: Remove redundant !setpolicy check
  cpufreq: Move the IS_ENABLED(CPU_THERMAL) macro into a stub
  cpufreq: s5pv210: Don't flood kernel log after cpufreq change
  cpufreq: pcc-cpufreq: Fail initialization if driver cannot be registered
  cpufreq: add driver for Raspberry Pi
  cpufreq: Switch imx7d to imx-cpufreq-dt for speed grading
  cpufreq: imx-cpufreq-dt: Remove global platform match list
  cpufreq: brcmstb-avs-cpufreq: Fix types for voltage/frequency
  cpufreq: brcmstb-avs-cpufreq: Fix initial command check
  cpufreq: armada-37xx: Remove set but not used variable 'freq'
  cpufreq: imx-cpufreq-dt: Fix no OPPs available on unfused parts
  dt-bindings: imx-cpufreq-dt: Document opp-supported-hw usage
  cpufreq: Add imx-cpufreq-dt driver
parents 13b06b78 70a59fde

Documentation/devicetree/bindings/cpufreq/imx-cpufreq-dt.txt

0 → 100644
+37 −0
Original line number Diff line number Diff line 
i.MX CPUFreq-DT OPP bindings

================================



Certain i.MX SoCs support different OPPs depending on the "market segment" and

"speed grading" value which are written in fuses. These bits are combined with

the opp-supported-hw values for each OPP to check if the OPP is allowed.



Required properties:

--------------------



For each opp entry in 'operating-points-v2' table:

- opp-supported-hw: Two bitmaps indicating:

  - Supported speed grade mask

  - Supported market segment mask

    0: Consumer

    1: Extended Consumer

    2: Industrial

    3: Automotive



Example:

--------



opp_table {

	compatible = "operating-points-v2";

	opp-1000000000 {

		opp-hz = /bits/ 64 <1000000000>;

		/* grade >= 0, consumer only */

		opp-supported-hw = <0xf>, <0x3>;

	};



	opp-1300000000 {

		opp-hz = /bits/ 64 <1300000000>;

		opp-microvolt = <1000000>;

		/* grade >= 1, all segments */

		opp-supported-hw = <0xe>, <0x7>;

	};

}

drivers/cpufreq/Kconfig.arm

+17 −0
Original line number Diff line number Diff line
@@ -93,6 +93,15 @@ config ARM_IMX6Q_CPUFREQ 


	  If in doubt, say N.



config ARM_IMX_CPUFREQ_DT

	tristate "Freescale i.MX8M cpufreq support"

	depends on ARCH_MXC && CPUFREQ_DT

	help

	  This adds cpufreq driver support for Freescale i.MX8M series SoCs,

	  based on cpufreq-dt.



	  If in doubt, say N.



config ARM_KIRKWOOD_CPUFREQ

	def_bool MACH_KIRKWOOD

	help
@@ -133,6 +142,14 @@ config ARM_QCOM_CPUFREQ_HW 
	  The driver implements the cpufreq interface for this HW engine.

	  Say Y if you want to support CPUFreq HW.



config ARM_RASPBERRYPI_CPUFREQ

	tristate "Raspberry Pi cpufreq support"

	depends on CLK_RASPBERRYPI || COMPILE_TEST

	help

	  This adds the CPUFreq driver for Raspberry Pi



	  If in doubt, say N.



config ARM_S3C_CPUFREQ

	bool

	help

drivers/cpufreq/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ obj-$(CONFIG_ACPI_CPPC_CPUFREQ) += cppc_cpufreq.o 
obj-$(CONFIG_ARCH_DAVINCI)		+= davinci-cpufreq.o

obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ)	+= highbank-cpufreq.o

obj-$(CONFIG_ARM_IMX6Q_CPUFREQ)		+= imx6q-cpufreq.o

obj-$(CONFIG_ARM_IMX_CPUFREQ_DT)	+= imx-cpufreq-dt.o

obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ)	+= kirkwood-cpufreq.o

obj-$(CONFIG_ARM_MEDIATEK_CPUFREQ)	+= mediatek-cpufreq.o

obj-$(CONFIG_MACH_MVEBU_V7)		+= mvebu-cpufreq.o
@@ -64,6 +65,7 @@ obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o 
obj-$(CONFIG_PXA3xx)			+= pxa3xx-cpufreq.o

obj-$(CONFIG_ARM_QCOM_CPUFREQ_HW)	+= qcom-cpufreq-hw.o

obj-$(CONFIG_ARM_QCOM_CPUFREQ_KRYO)	+= qcom-cpufreq-kryo.o

obj-$(CONFIG_ARM_RASPBERRYPI_CPUFREQ) 	+= raspberrypi-cpufreq.o

obj-$(CONFIG_ARM_S3C2410_CPUFREQ)	+= s3c2410-cpufreq.o

obj-$(CONFIG_ARM_S3C2412_CPUFREQ)	+= s3c2412-cpufreq.o

obj-$(CONFIG_ARM_S3C2416_CPUFREQ)	+= s3c2416-cpufreq.o

drivers/cpufreq/armada-37xx-cpufreq.c

+1 −3
Original line number Diff line number Diff line
@@ -257,7 +257,7 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base, 
static void __init armada37xx_cpufreq_avs_setup(struct regmap *base,

						struct armada_37xx_dvfs *dvfs)

{

	unsigned int avs_val = 0, freq;

	unsigned int avs_val = 0;

	int load_level = 0;



	if (base == NULL)
@@ -275,8 +275,6 @@ static void __init armada37xx_cpufreq_avs_setup(struct regmap *base, 




	for (load_level = 1; load_level < LOAD_LEVEL_NR; load_level++) {

		freq = dvfs->cpu_freq_max / dvfs->divider[load_level];



		avs_val = dvfs->avs[load_level];

		regmap_update_bits(base, ARMADA_37XX_AVS_VSET(load_level-1),

		    ARMADA_37XX_AVS_VDD_MASK << ARMADA_37XX_AVS_HIGH_VDD_LIMIT |

drivers/cpufreq/brcmstb-avs-cpufreq.c

+6 −6
Original line number Diff line number Diff line
@@ -384,12 +384,12 @@ static int brcm_avs_set_pstate(struct private_data *priv, unsigned int pstate) 
	return __issue_avs_command(priv, AVS_CMD_SET_PSTATE, true, args);

}



static unsigned long brcm_avs_get_voltage(void __iomem *base)

static u32 brcm_avs_get_voltage(void __iomem *base)

{

	return readl(base + AVS_MBOX_VOLTAGE1);

}



static unsigned long brcm_avs_get_frequency(void __iomem *base)

static u32 brcm_avs_get_frequency(void __iomem *base)

{

	return readl(base + AVS_MBOX_FREQUENCY) * 1000;	/* in kHz */

}
@@ -446,8 +446,8 @@ static bool brcm_avs_is_firmware_loaded(struct private_data *priv) 
	rc = brcm_avs_get_pmap(priv, NULL);

	magic = readl(priv->base + AVS_MBOX_MAGIC);



	return (magic == AVS_FIRMWARE_MAGIC) && (rc != -ENOTSUPP) &&

		(rc != -EINVAL);

	return (magic == AVS_FIRMWARE_MAGIC) && ((rc != -ENOTSUPP) ||

		(rc != -EINVAL));

}



static unsigned int brcm_avs_cpufreq_get(unsigned int cpu)
@@ -653,14 +653,14 @@ static ssize_t show_brcm_avs_voltage(struct cpufreq_policy *policy, char *buf) 
{

	struct private_data *priv = policy->driver_data;



	return sprintf(buf, "0x%08lx\n", brcm_avs_get_voltage(priv->base));

	return sprintf(buf, "0x%08x\n", brcm_avs_get_voltage(priv->base));

}



static ssize_t show_brcm_avs_frequency(struct cpufreq_policy *policy, char *buf)

{

	struct private_data *priv = policy->driver_data;



	return sprintf(buf, "0x%08lx\n", brcm_avs_get_frequency(priv->base));

	return sprintf(buf, "0x%08x\n", brcm_avs_get_frequency(priv->base));

}



cpufreq_freq_attr_ro(brcm_avs_pstate);

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