Commit 585d3545 authored Jul 23, 2020 by Serge Semin Committed by Vinod Koul Jul 27, 2020

dmaengine: dw: Initialize min and max burst DMA device capability

According to the DW APB DMAC data book the minimum burst transaction
length is 1 and it's true for any version of the controller since
isn't parametrised in the coreAssembler so can't be changed at the
IP-core synthesis stage. The maximum burst transaction can vary from
channel to channel and from controller to controller depending on a
IP-core parameter the system engineer activated during the IP-core
synthesis. Let's initialise both min_burst and max_burst members of the
DMA controller descriptor with extreme values so the DMA clients could
use them to properly optimize the DMA requests. The channels and
controller-specific max_burst length initialization will be introduced
by the follow-up patches.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200723005848.31907-9-Sergey.Semin@baikalelectronics.ru

Signed-off-by: Vinod Koul <vkoul@kernel.org>

parent e6fe5767

drivers/dma/dw/core.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -1223,6 +1223,8 @@ int do_dma_probe(struct dw_dma_chip *chip)
		dw->dma.device_issue_pending = dwc_issue_pending;

		/* DMA capabilities */
		dw->dma.min_burst = DW_DMA_MIN_BURST;
		dw->dma.max_burst = DW_DMA_MAX_BURST;
		dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS;
		dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS;
		dw->dma.directions = BIT(DMA_DEV_TO_MEM) \| BIT(DMA_MEM_TO_DEV) \|

include/linux/platform_data/dma-dw.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -12,6 +12,8 @@

		#define DW_DMA_MAX_NR_MASTERS 4
		#define DW_DMA_MAX_NR_CHANNELS 8
		#define DW_DMA_MIN_BURST 1
		#define DW_DMA_MAX_BURST 256

		/**
		* struct dw_dma_slave - Controller-specific information about a slave

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