Unverified Commit 5831fdb0 authored by Jiaxun Yang's avatar Jiaxun Yang Committed by Paul Burton
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MIPS: Loongson2ef: clean up loongson64 related code 



Remove unrelevent macros, defines and codes from loongson2ef mach.
Also rename some defines to match new naming.

Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: paul.burton@mips.com
parent 71e2f4dd

arch/mips/include/asm/mach-loongson2ef/boot_param.h

deleted100644 → 0
+0 −221
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __ASM_MACH_LOONGSON64_BOOT_PARAM_H_

#define __ASM_MACH_LOONGSON64_BOOT_PARAM_H_



#define SYSTEM_RAM_LOW		1

#define SYSTEM_RAM_HIGH		2

#define SYSTEM_RAM_RESERVED	3

#define PCI_IO			4

#define PCI_MEM			5

#define LOONGSON_CFG_REG	6

#define VIDEO_ROM		7

#define ADAPTER_ROM		8

#define ACPI_TABLE		9

#define SMBIOS_TABLE		10

#define MAX_MEMORY_TYPE		11



#define LOONGSON3_BOOT_MEM_MAP_MAX 128

struct efi_memory_map_loongson {

	u16 vers;	/* version of efi_memory_map */

	u32 nr_map;	/* number of memory_maps */

	u32 mem_freq;	/* memory frequence */

	struct mem_map {

		u32 node_id;	/* node_id which memory attached to */

		u32 mem_type;	/* system memory, pci memory, pci io, etc. */

		u64 mem_start;	/* memory map start address */

		u32 mem_size;	/* each memory_map size, not the total size */

	} map[LOONGSON3_BOOT_MEM_MAP_MAX];

} __packed;



enum loongson_cpu_type {

	Legacy_2E = 0x0,

	Legacy_2F = 0x1,

	Legacy_3A = 0x2,

	Legacy_3B = 0x3,

	Legacy_1A = 0x4,

	Legacy_1B = 0x5,

	Legacy_2G = 0x6,

	Legacy_2H = 0x7,

	Loongson_1A = 0x100,

	Loongson_1B = 0x101,

	Loongson_2E = 0x200,

	Loongson_2F = 0x201,

	Loongson_2G = 0x202,

	Loongson_2H = 0x203,

	Loongson_3A = 0x300,

	Loongson_3B = 0x301

};



/*

 * Capability and feature descriptor structure for MIPS CPU

 */

struct efi_cpuinfo_loongson {

	u16 vers;     /* version of efi_cpuinfo_loongson */

	u32 processor_id; /* PRID, e.g. 6305, 6306 */

	u32 cputype;  /* Loongson_3A/3B, etc. */

	u32 total_node;   /* num of total numa nodes */

	u16 cpu_startup_core_id; /* Boot core id */

	u16 reserved_cores_mask;

	u32 cpu_clock_freq; /* cpu_clock */

	u32 nr_cpus;

} __packed;



#define MAX_UARTS 64

struct uart_device {

	u32 iotype; /* see include/linux/serial_core.h */

	u32 uartclk;

	u32 int_offset;

	u64 uart_base;

} __packed;



#define MAX_SENSORS 64

#define SENSOR_TEMPER  0x00000001

#define SENSOR_VOLTAGE 0x00000002

#define SENSOR_FAN     0x00000004

struct sensor_device {

	char name[32];  /* a formal name */

	char label[64]; /* a flexible description */

	u32 type;       /* SENSOR_* */

	u32 id;         /* instance id of a sensor-class */

	u32 fan_policy; /* see loongson_hwmon.h */

	u32 fan_percent;/* only for constant speed policy */

	u64 base_addr;  /* base address of device registers */

} __packed;



struct system_loongson {

	u16 vers;     /* version of system_loongson */

	u32 ccnuma_smp; /* 0: no numa; 1: has numa */

	u32 sing_double_channel; /* 1:single; 2:double */

	u32 nr_uarts;

	struct uart_device uarts[MAX_UARTS];

	u32 nr_sensors;

	struct sensor_device sensors[MAX_SENSORS];

	char has_ec;

	char ec_name[32];

	u64 ec_base_addr;

	char has_tcm;

	char tcm_name[32];

	u64 tcm_base_addr;

	u64 workarounds; /* see workarounds.h */

} __packed;



struct irq_source_routing_table {

	u16 vers;

	u16 size;

	u16 rtr_bus;

	u16 rtr_devfn;

	u32 vendor;

	u32 device;

	u32 PIC_type;   /* conform use HT or PCI to route to CPU-PIC */

	u64 ht_int_bit; /* 3A: 1<<24; 3B: 1<<16 */

	u64 ht_enable;  /* irqs used in this PIC */

	u32 node_id;    /* node id: 0x0-0; 0x1-1; 0x10-2; 0x11-3 */

	u64 pci_mem_start_addr;

	u64 pci_mem_end_addr;

	u64 pci_io_start_addr;

	u64 pci_io_end_addr;

	u64 pci_config_addr;

	u32 dma_mask_bits;

} __packed;



struct interface_info {

	u16 vers; /* version of the specificition */

	u16 size;

	u8  flag;

	char description[64];

} __packed;



#define MAX_RESOURCE_NUMBER 128

struct resource_loongson {

	u64 start; /* resource start address */

	u64 end;   /* resource end address */

	char name[64];

	u32 flags;

};



struct archdev_data {};  /* arch specific additions */



struct board_devices {

	char name[64];    /* hold the device name */

	u32 num_resources; /* number of device_resource */

	/* for each device's resource */

	struct resource_loongson resource[MAX_RESOURCE_NUMBER];

	/* arch specific additions */

	struct archdev_data archdata;

};



struct loongson_special_attribute {

	u16 vers;     /* version of this special */

	char special_name[64]; /* special_atribute_name */

	u32 loongson_special_type; /* type of special device */

	/* for each device's resource */

	struct resource_loongson resource[MAX_RESOURCE_NUMBER];

};



struct loongson_params {

	u64 memory_offset;	/* efi_memory_map_loongson struct offset */

	u64 cpu_offset;		/* efi_cpuinfo_loongson struct offset */

	u64 system_offset;	/* system_loongson struct offset */

	u64 irq_offset;		/* irq_source_routing_table struct offset */

	u64 interface_offset;	/* interface_info struct offset */

	u64 special_offset;	/* loongson_special_attribute struct offset */

	u64 boarddev_table_offset;  /* board_devices offset */

};



struct smbios_tables {

	u16 vers;     /* version of smbios */

	u64 vga_bios; /* vga_bios address */

	struct loongson_params lp;

};



struct efi_reset_system_t {

	u64 ResetCold;

	u64 ResetWarm;

	u64 ResetType;

	u64 Shutdown;

	u64 DoSuspend; /* NULL if not support */

};



struct efi_loongson {

	u64 mps;	/* MPS table */

	u64 acpi;	/* ACPI table (IA64 ext 0.71) */

	u64 acpi20;	/* ACPI table (ACPI 2.0) */

	struct smbios_tables smbios;	/* SM BIOS table */

	u64 sal_systab;	/* SAL system table */

	u64 boot_info;	/* boot info table */

};



struct boot_params {

	struct efi_loongson efi;

	struct efi_reset_system_t reset_system;

};



struct loongson_system_configuration {

	u32 nr_cpus;

	u32 nr_nodes;

	int cores_per_node;

	int cores_per_package;

	u16 boot_cpu_id;

	u16 reserved_cpus_mask;

	enum loongson_cpu_type cputype;

	u64 ht_control_base;

	u64 pci_mem_start_addr;

	u64 pci_mem_end_addr;

	u64 pci_io_base;

	u64 restart_addr;

	u64 poweroff_addr;

	u64 suspend_addr;

	u64 vgabios_addr;

	u32 dma_mask_bits;

	char ecname[32];

	u32 nr_uarts;

	struct uart_device uarts[MAX_UARTS];

	u32 nr_sensors;

	struct sensor_device sensors[MAX_SENSORS];

	u64 workarounds;

};



extern struct efi_memory_map_loongson *loongson_memmap;

extern struct loongson_system_configuration loongson_sysconf;



#endif

arch/mips/include/asm/mach-loongson2ef/cpu-feature-overrides.h

+3 −12
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-or-later */

/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2009 Wu Zhangjin <wuzhangjin@gmail.com>

 * Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>

 * Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
@@ -13,8 +10,8 @@ 
 *	loongson2f user manual.

 */



#ifndef __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H

#define __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H

#ifndef __ASM_MACH_LOONGSON2EF_CPU_FEATURE_OVERRIDES_H

#define __ASM_MACH_LOONGSON2EF_CPU_FEATURE_OVERRIDES_H



#define cpu_has_32fpr		1

#define cpu_has_3k_cache	0
@@ -44,10 +41,4 @@ 
#define cpu_has_vtag_icache	0

#define cpu_has_watch		1



#ifdef CONFIG_CPU_LOONGSON64

#define cpu_has_wsbh		1

#define cpu_has_ic_fills_f_dc	1

#define cpu_hwrena_impl_bits	0xc0000000

#endif



#endif /* __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H */

arch/mips/include/asm/mach-loongson2ef/irq.h

deleted100644 → 0
+0 −44
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __ASM_MACH_LOONGSON64_IRQ_H_

#define __ASM_MACH_LOONGSON64_IRQ_H_



#include <boot_param.h>



#ifdef CONFIG_CPU_LOONGSON64



/* cpu core interrupt numbers */

#define MIPS_CPU_IRQ_BASE 56



#define LOONGSON_UART_IRQ   (MIPS_CPU_IRQ_BASE + 2) /* UART */

#define LOONGSON_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 3) /* CASCADE */

#define LOONGSON_TIMER_IRQ  (MIPS_CPU_IRQ_BASE + 7) /* CPU Timer */



#define LOONGSON_HT1_CFG_BASE		loongson_sysconf.ht_control_base

#define LOONGSON_HT1_INT_VECTOR_BASE	(LOONGSON_HT1_CFG_BASE + 0x80)

#define LOONGSON_HT1_INT_EN_BASE	(LOONGSON_HT1_CFG_BASE + 0xa0)

#define LOONGSON_HT1_INT_VECTOR(n)	\

		LOONGSON3_REG32(LOONGSON_HT1_INT_VECTOR_BASE, 4 * (n))

#define LOONGSON_HT1_INTN_EN(n)		\

		LOONGSON3_REG32(LOONGSON_HT1_INT_EN_BASE, 4 * (n))



#define LOONGSON_INT_ROUTER_OFFSET	0x1400

#define LOONGSON_INT_ROUTER_INTEN	\

	  LOONGSON3_REG32(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + 0x24)

#define LOONGSON_INT_ROUTER_INTENSET	\

	  LOONGSON3_REG32(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + 0x28)

#define LOONGSON_INT_ROUTER_INTENCLR	\

	  LOONGSON3_REG32(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + 0x2c)

#define LOONGSON_INT_ROUTER_ENTRY(n)	\

	  LOONGSON3_REG8(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + n)

#define LOONGSON_INT_ROUTER_LPC		LOONGSON_INT_ROUTER_ENTRY(0x0a)

#define LOONGSON_INT_ROUTER_HT1(n)	LOONGSON_INT_ROUTER_ENTRY(n + 0x18)



#define LOONGSON_INT_COREx_INTy(x, y)	(1<<(x) | 1<<(y+4))	/* route to int y of core x */



#endif



extern void fixup_irqs(void);

extern void loongson3_ipi_interrupt(struct pt_regs *regs);



#include_next <irq.h>

#endif /* __ASM_MACH_LOONGSON64_IRQ_H_ */

arch/mips/include/asm/mach-loongson2ef/kernel-entry-init.h

deleted100644 → 0
+0 −90
Original line number Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2005 Embedded Alley Solutions, Inc

 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)

 * Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn)

 * Copyright (C) 2012 Huacai Chen (chenhc@lemote.com)

 */

#ifndef __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H

#define __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H



#include <asm/cpu.h>



/*

 * Override macros used in arch/mips/kernel/head.S.

 */

	.macro	kernel_entry_setup

#ifdef CONFIG_CPU_LOONGSON64

	.set	push

	.set	mips64

	/* Set LPA on LOONGSON3 config3 */

	mfc0	t0, CP0_CONFIG3

	or	t0, (0x1 << 7)

	mtc0	t0, CP0_CONFIG3

	/* Set ELPA on LOONGSON3 pagegrain */

	mfc0	t0, CP0_PAGEGRAIN

	or	t0, (0x1 << 29)

	mtc0	t0, CP0_PAGEGRAIN

	/* Enable STFill Buffer */

	mfc0	t0, CP0_PRID

	/* Loongson-3A R4+ */

	andi	t1, t0, PRID_IMP_MASK

	li	t2, PRID_IMP_LOONGSON_64G

	beq     t1, t2, 1f

	nop

	/* Loongson-3A R2/R3 */

	andi	t0, (PRID_IMP_MASK | PRID_REV_MASK)

	slti	t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)

	bnez	t0, 2f

	nop

1:

	mfc0	t0, CP0_CONFIG6

	or	t0, 0x100

	mtc0	t0, CP0_CONFIG6

2:

	_ehb

	.set	pop

#endif

	.endm



/*

 * Do SMP slave processor setup.

 */

	.macro	smp_slave_setup

#ifdef CONFIG_CPU_LOONGSON64

	.set	push

	.set	mips64

	/* Set LPA on LOONGSON3 config3 */

	mfc0	t0, CP0_CONFIG3

	or	t0, (0x1 << 7)

	mtc0	t0, CP0_CONFIG3

	/* Set ELPA on LOONGSON3 pagegrain */

	mfc0	t0, CP0_PAGEGRAIN

	or	t0, (0x1 << 29)

	mtc0	t0, CP0_PAGEGRAIN

	/* Enable STFill Buffer */

	mfc0	t0, CP0_PRID

	/* Loongson-3A R4+ */

	andi	t1, t0, PRID_IMP_MASK

	li	t2, PRID_IMP_LOONGSON_64G

	beq     t1, t2, 1f

	nop

	/* Loongson-3A R2/R3 */

	andi	t0, (PRID_IMP_MASK | PRID_REV_MASK)

	slti	t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)

	bnez	t0, 2f

	nop

1:

	mfc0	t0, CP0_CONFIG6

	or	t0, 0x100

	mtc0	t0, CP0_CONFIG6

2:

	_ehb

	.set	pop

#endif

	.endm



#endif /* __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H */

arch/mips/include/asm/mach-loongson2ef/loongson.h

+5 −32
Original line number Diff line number Diff line
@@ -4,13 +4,12 @@ 
 * Author: Wu Zhangjin <wuzhangjin@gmail.com>

 */



#ifndef __ASM_MACH_LOONGSON64_LOONGSON_H

#define __ASM_MACH_LOONGSON64_LOONGSON_H

#ifndef __ASM_MACH_LOONGSON2EF_LOONGSON_H

#define __ASM_MACH_LOONGSON2EF_LOONGSON_H



#include <linux/io.h>

#include <linux/init.h>

#include <linux/irq.h>

#include <boot_param.h>



/* loongson internal northbridge initialization */

extern void bonito_irq_init(void);
@@ -30,7 +29,7 @@ extern void __init prom_init_cmdline(void); 
extern void __init prom_init_machtype(void);

extern void __init prom_init_env(void);

#ifdef CONFIG_LOONGSON_UART_BASE

extern unsigned long _loongson_uart_base[], loongson_uart_base[];

extern unsigned long _loongson_uart_base, loongson_uart_base;

extern void prom_init_loongson_uart_base(void);

#endif
@@ -58,12 +57,6 @@ extern int mach_i8259_irq(void); 
#define LOONGSON_REG(x) \

	(*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))



#define LOONGSON3_REG8(base, x) \

	(*(volatile u8 *)((char *)TO_UNCAC(base) + (x)))



#define LOONGSON3_REG32(base, x) \

	(*(volatile u32 *)((char *)TO_UNCAC(base) + (x)))



#define LOONGSON_IRQ_BASE	32

#define LOONGSON2_PERFCNT_IRQ	(MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */
@@ -89,10 +82,6 @@ static inline void do_perfcnt_IRQ(void) 
#define LOONGSON_REG_BASE	0x1fe00000

#define LOONGSON_REG_SIZE	0x00100000	/* 256Bytes + 256Bytes + ??? */

#define LOONGSON_REG_TOP	(LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)

/* Loongson-3 specific registers */

#define LOONGSON3_REG_BASE	0x3ff00000

#define LOONGSON3_REG_SIZE	0x00100000	/* 256Bytes + 256Bytes + ??? */

#define LOONGSON3_REG_TOP	(LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1)



#define LOONGSON_LIO1_BASE	0x1ff00000

#define LOONGSON_LIO1_SIZE	0x00100000	/* 1M */
@@ -108,12 +97,7 @@ static inline void do_perfcnt_IRQ(void) 
#define LOONGSON_PCICFG_BASE	0x1fe80000

#define LOONGSON_PCICFG_SIZE	0x00000800	/* 2K */

#define LOONGSON_PCICFG_TOP	(LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1)



#ifdef CONFIG_CPU_LOONGSON64

#define LOONGSON_PCIIO_BASE	loongson_sysconf.pci_io_base

#else

#define LOONGSON_PCIIO_BASE	0x1fd00000

#endif



#define LOONGSON_PCIIO_SIZE	0x00100000	/* 1M */

#define LOONGSON_PCIIO_TOP	(LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1)
@@ -244,19 +228,8 @@ static inline void do_perfcnt_IRQ(void) 
#define LOONGSON_PXARB_CFG		LOONGSON_REG(LOONGSON_REGBASE + 0x68)

#define LOONGSON_PXARB_STATUS		LOONGSON_REG(LOONGSON_REGBASE + 0x6c)



#define MAX_PACKAGES 4



/* Chip Config registor of each physical cpu package, PRid >= Loongson-2F */

extern u64 loongson_chipcfg[MAX_PACKAGES];

#define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id]))



/* Chip Temperature registor of each physical cpu package, PRid >= Loongson-3A */

extern u64 loongson_chiptemp[MAX_PACKAGES];

#define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id]))



/* Freq Control register of each physical cpu package, PRid >= Loongson-3B */

extern u64 loongson_freqctrl[MAX_PACKAGES];

#define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id]))

#define LOONGSON_CHIPCFG	(void __iomem *)TO_UNCAC(0x1fc00180)



/* pcimap */
@@ -352,4 +325,4 @@ extern unsigned long _loongson_addrwincfg_base; 


#endif	/* ! CONFIG_CPU_SUPPORTS_ADDRWINCFG */



#endif /* __ASM_MACH_LOONGSON64_LOONGSON_H */
 
#endif /* __ASM_MACH_LOONGSON2EF_LOONGSON_H */

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