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When the CPU has support for the byte and word exclusive operations, userspace should use them in preference to the SWP instructions. Detect the presence of these instructions by reading the ISAR CPU ID registers and adjust the ELF HWCAP mask appropriately. Note that ARM1136 < r1p0 has no ISAR4, so this is explicitly detected and the test disabled, leaving the current situation where HWCAP_SWP is set. Tested-by:Tony Lindgren <tony@atomide.com> Acked-by:
Catalin Marinas <catalin.marinas@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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