Commit 580b064d authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
Browse files

arm64: dts: imx8mq: add clock for GPIO node 



i.MX8MQ has clock gate for each GPIO bank, add clock info
to GPIO node for clock management.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 64d26f8c

arch/arm64/boot/dts/freescale/imx8mq.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -172,6 +172,7 @@ 
				reg = <0x30200000 0x10000>;

				interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,

				             <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MQ_CLK_GPIO1_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -183,6 +184,7 @@ 
				reg = <0x30210000 0x10000>;

				interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,

				             <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MQ_CLK_GPIO2_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -194,6 +196,7 @@ 
				reg = <0x30220000 0x10000>;

				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,

				             <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MQ_CLK_GPIO3_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -205,6 +208,7 @@ 
				reg = <0x30230000 0x10000>;

				interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,

				             <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MQ_CLK_GPIO4_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -216,6 +220,7 @@ 
				reg = <0x30240000 0x10000>;

				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,

				             <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MQ_CLK_GPIO5_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;

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