Commit 58095d7f authored by Ben Dooks's avatar Ben Dooks Committed by Russell King
Browse files

[ARM] 3802/1: S3C24XX: PM tidy up cache flushing 



Change to using flush_cache_all() in pm.c and
also remove the need to flush the cache in the
PM code.

This changes the sleep.S code to have an entry
to store the registers for resume, and then a
second entry (after the caches are cleaned)
to do the suspend and resume.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 1e582fc7

arch/arm/mach-s3c2410/pm.c

+10 −10
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ 
#include <linux/ioport.h>

#include <linux/delay.h>



#include <asm/cacheflush.h>

#include <asm/hardware.h>

#include <asm/io.h>
@@ -52,14 +53,6 @@ 


unsigned long s3c_pm_flags;



/* cache functions from arch/arm/mm/proc-arm920.S */



#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH

extern void arm920_flush_kern_cache_all(void);

#else

static void arm920_flush_kern_cache_all(void) { }

#endif



#define PFX "s3c24xx-pm: "



static struct sleep_save core_save[] = {
@@ -567,7 +560,7 @@ static int s3c2410_pm_enter(suspend_state_t state) 


	/* flush cache back to ram */



	arm920_flush_kern_cache_all();

	flush_cache_all();



	s3c2410_pm_check_store();
@@ -575,7 +568,14 @@ static int s3c2410_pm_enter(suspend_state_t state) 


	__raw_writel(0x00, S3C2410_CLKCON);  /* turn off clocks over sleep */



	s3c2410_cpu_suspend(regs_save);

	/* s3c2410_cpu_save will also act as our return point from when

	 * we resume as it saves its own register state, so use the return

	 * code to differentiate return from save and return from sleep */



	if (s3c2410_cpu_save(regs_save) == 0) {

		flush_cache_all();

		s3c2410_cpu_suspend();

	}



	/* restore the cpu state */

arch/arm/mach-s3c2410/pm.h

+2 −1
Original line number Diff line number Diff line
@@ -40,7 +40,8 @@ extern unsigned long s3c_pm_flags; 


/* from sleep.S */



extern void s3c2410_cpu_suspend(unsigned long *saveblk);

extern int  s3c2410_cpu_save(unsigned long *saveblk);

extern void s3c2410_cpu_suspend(void);

extern void s3c2410_cpu_resume(void);



extern unsigned long s3c2410_sleep_save_phys;

arch/arm/mach-s3c2410/sleep.S

+22 −9
Original line number Diff line number Diff line
@@ -41,15 +41,25 @@ 


	.text



	/* s3c2410_cpu_suspend

	/* s3c2410_cpu_save

	 *

	 * put the cpu into sleep mode

	 * save enough of the CPU state to allow us to re-start

	 * pm.c code. as we store items like the sp/lr, we will

	 * end up returning from this function when the cpu resumes

	 * so the return value is set to mark this.

	 *

	 * This arangement means we avoid having to flush the cache

	 * from this code.

	 *

	 * entry:

	 *	r0 = sleep save block

	 *	r0 = pointer to save block

	 *

	 * exit:

	 *	r0 = 0 => we stored everything

	 *	     1 => resumed from sleep

	*/



ENTRY(s3c2410_cpu_suspend)

ENTRY(s3c2410_cpu_save)

	stmfd	sp!, { r4 - r12, lr }



	@@ store co-processor registers
@@ -62,13 +72,15 @@ ENTRY(s3c2410_cpu_suspend) 


	stmia	r0, { r4 - r13 }



	@@ flush the caches to ensure everything is back out to

	@@ SDRAM before the core powers down

	mov	r0, #0

	ldmfd	sp, { r4 - r12, pc }



#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH

	bl	arm920_flush_kern_cache_all

#endif

	/* s3c2410_cpu_suspend

	 *

	 * put the cpu into sleep mode

	*/



ENTRY(s3c2410_cpu_suspend)

	@@ prepare cpu to sleep



	ldr	r4, =S3C2410_REFRESH
@@ -100,6 +112,7 @@ s3c2410_do_sleep: 
	@@ turned on, this restores the last bits from the

	@@ stack

resume_with_mmu:

	mov	r0, #1

	ldmfd	sp!, { r4 - r12, pc }



	.ltorg

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