Commit 579d1b3f authored May 08, 2020 by Luke Nelson Committed by Will Deacon May 11, 2020

arm64: insn: Fix two bugs in encoding 32-bit logical immediates



This patch fixes two issues present in the current function for encoding
arm64 logical immediates when using the 32-bit variants of instructions.

First, the code does not correctly reject an all-ones 32-bit immediate,
and returns an undefined instruction encoding.

Second, the code incorrectly rejects some 32-bit immediates that are
actually encodable as logical immediates. The root cause is that the code
uses a default mask of 64-bit all-ones, even for 32-bit immediates.
This causes an issue later on when the default mask is used to fill the
top bits of the immediate with ones, shown here:

  /*
   * Pattern: 0..01..10..01..1
   *
   * Fill the unused top bits with ones, and check if
   * the result is a valid immediate (all ones with a
   * contiguous ranges of zeroes).
   */
  imm |= ~mask;
  if (!range_of_ones(~imm))
          return AARCH64_BREAK_FAULT;

To see the problem, consider an immediate of the form 0..01..10..01..1,
where the upper 32 bits are zero, such as 0x80000001. The code checks
if ~(imm | ~mask) contains a range of ones: the incorrect mask yields
1..10..01..10..0, which fails the check; the correct mask yields
0..01..10..0, which succeeds.

The fix for both issues is to generate a correct mask based on the
instruction immediate size, and use the mask to check for all-ones,
all-zeroes, and values wider than the mask.

Currently, arch/arm64/kvm/va_layout.c is the only user of this function,
which uses 64-bit immediates and therefore won't trigger these bugs.

We tested the new code against llvm-mc with all 1,302 encodable 32-bit
logical immediates and all 5,334 encodable 64-bit logical immediates.

Fixes: ef3935ee ("arm64: insn: Add encoder for bitwise operations using literals")
Suggested-by: Will Deacon <will@kernel.org>
Co-developed-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200508181547.24783-2-luke.r.nels@gmail.com


Signed-off-by: Will Deacon <will@kernel.org>

parent 6a8b55ed

arch/arm64/kernel/insn.c

+7 −7

Original line number	Diff line number	Diff line
		@@ -1535,16 +1535,10 @@ static u32 aarch64_encode_immediate(u64 imm,
		u32 insn)
		{
		unsigned int immr, imms, n, ones, ror, esz, tmp;
		u64 mask = ~0UL;

		/* Can't encode full zeroes or full ones */
		if (!imm \|\| !~imm)
		return AARCH64_BREAK_FAULT;
		u64 mask;

		switch (variant) {
		case AARCH64_INSN_VARIANT_32BIT:
		if (upper_32_bits(imm))
		return AARCH64_BREAK_FAULT;
		esz = 32;
		break;
		case AARCH64_INSN_VARIANT_64BIT:
		@@ -1556,6 +1550,12 @@ static u32 aarch64_encode_immediate(u64 imm,
		return AARCH64_BREAK_FAULT;
		}

		mask = GENMASK(esz - 1, 0);

		/* Can't encode full zeroes, full ones, or value wider than the mask */
		if (!imm \|\| imm == mask \|\| imm & ~mask)
		return AARCH64_BREAK_FAULT;

		/*
		* Inverse of Replicate(). Try to spot a repeating pattern
		* with a pow2 stride.

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