Commit 5781823f authored by Thor Thayer's avatar Thor Thayer Committed by Borislav Petkov
Browse files

EDAC/altera: Use the Altera System Manager driver 



Simplify by using the Altera System Manager driver that abstracts the
differences between ARM32 and ARM64. Also allows the removal of the
Arria10 test function since this is handled by the System Manager
driver.

Signed-off-by: default avatarThor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Cc: James Morse <james.morse@arm.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Meng.Li@windriver.com
Cc: Robert Richter <rrichter@marvell.com>
Cc: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/1574361048-17572-4-git-send-email-thor.thayer@linux.intel.com
parent 08a260d9

drivers/edac/altera_edac.c

+8 −124
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include <linux/interrupt.h>

#include <linux/irqchip/chained_irq.h>

#include <linux/kernel.h>

#include <linux/mfd/altera-sysmgr.h>

#include <linux/mfd/syscon.h>

#include <linux/notifier.h>

#include <linux/of_address.h>
@@ -275,7 +276,6 @@ release: 
	return ret;

}



static int socfpga_is_a10(void);

static int altr_sdram_probe(struct platform_device *pdev)

{

	const struct of_device_id *id;
@@ -399,7 +399,7 @@ static int altr_sdram_probe(struct platform_device *pdev) 
		goto err;



	/* Only the Arria10 has separate IRQs */

	if (socfpga_is_a10()) {

	if (of_machine_is_compatible("altr,socfpga-arria10")) {

		/* Arria10 specific initialization */

		res = a10_init(mc_vbase);

		if (res < 0)
@@ -502,69 +502,6 @@ module_platform_driver(altr_sdram_edac_driver); 


#endif	/* CONFIG_EDAC_ALTERA_SDRAM */



/**************** Stratix 10 EDAC Memory Controller Functions ************/



/**

 * s10_protected_reg_write

 * Write to a protected SMC register.

 * @context: Not used.

 * @reg: Address of register

 * @value: Value to write

 * Return: INTEL_SIP_SMC_STATUS_OK (0) on success

 *	   INTEL_SIP_SMC_REG_ERROR on error

 *	   INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION if not supported

 */

static int s10_protected_reg_write(void *context, unsigned int reg,

				   unsigned int val)

{

	struct arm_smccc_res result;

	unsigned long offset = (unsigned long)context;



	arm_smccc_smc(INTEL_SIP_SMC_REG_WRITE, offset + reg, val, 0, 0,

		      0, 0, 0, &result);



	return (int)result.a0;

}



/**

 * s10_protected_reg_read

 * Read the status of a protected SMC register

 * @context: Not used.

 * @reg: Address of register

 * @value: Value read.

 * Return: INTEL_SIP_SMC_STATUS_OK (0) on success

 *	   INTEL_SIP_SMC_REG_ERROR on error

 *	   INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION if not supported

 */

static int s10_protected_reg_read(void *context, unsigned int reg,

				  unsigned int *val)

{

	struct arm_smccc_res result;

	unsigned long offset = (unsigned long)context;



	arm_smccc_smc(INTEL_SIP_SMC_REG_READ, offset + reg, 0, 0, 0,

		      0, 0, 0, &result);



	*val = (unsigned int)result.a1;



	return (int)result.a0;

}



static const struct regmap_config s10_sdram_regmap_cfg = {

	.name = "s10_ddr",

	.reg_bits = 32,

	.reg_stride = 4,

	.val_bits = 32,

	.max_register = 0xffd12228,

	.reg_read = s10_protected_reg_read,

	.reg_write = s10_protected_reg_write,

	.use_single_read = true,

	.use_single_write = true,

	.fast_io = true,

};



/************** </Stratix10 EDAC Memory Controller Functions> ***********/



/************************* EDAC Parent Probe *************************/



static const struct of_device_id altr_edac_device_of_match[];
@@ -1009,11 +946,6 @@ static int __maybe_unused altr_init_memory_port(void __iomem *ioaddr, int port) 
	return ret;

}



static int socfpga_is_a10(void)

{

	return of_machine_is_compatible("altr,socfpga-arria10");

}



static __init int __maybe_unused

altr_init_a10_ecc_block(struct device_node *np, u32 irq_mask,

			u32 ecc_ctrl_en_mask, bool dual_port)
@@ -1029,34 +961,10 @@ altr_init_a10_ecc_block(struct device_node *np, u32 irq_mask, 
	/* Get the ECC Manager - parent of the device EDACs */

	np_eccmgr = of_get_parent(np);



	if (socfpga_is_a10()) {

		ecc_mgr_map = syscon_regmap_lookup_by_phandle(np_eccmgr,

	ecc_mgr_map =

		altr_sysmgr_regmap_lookup_by_phandle(np_eccmgr,

						     "altr,sysmgr-syscon");

	} else {

		struct device_node *sysmgr_np;

		struct resource res;

		uintptr_t base;



		sysmgr_np = of_parse_phandle(np_eccmgr,

					     "altr,sysmgr-syscon", 0);

		if (!sysmgr_np) {

			edac_printk(KERN_ERR, EDAC_DEVICE,

				    "Unable to find altr,sysmgr-syscon\n");

			return -ENODEV;

		}



		if (of_address_to_resource(sysmgr_np, 0, &res)) {

			of_node_put(sysmgr_np);

			return -ENOMEM;

		}



		/* Need physical address for SMCC call */

		base = res.start;



		ecc_mgr_map = regmap_init(NULL, NULL, (void *)base,

					  &s10_sdram_regmap_cfg);

		of_node_put(sysmgr_np);

	}

	of_node_put(np_eccmgr);

	if (IS_ERR(ecc_mgr_map)) {

		edac_printk(KERN_ERR, EDAC_DEVICE,
@@ -2171,33 +2079,9 @@ static int altr_edac_a10_probe(struct platform_device *pdev) 
	platform_set_drvdata(pdev, edac);

	INIT_LIST_HEAD(&edac->a10_ecc_devices);



	if (socfpga_is_a10()) {

	edac->ecc_mgr_map =

			syscon_regmap_lookup_by_phandle(pdev->dev.of_node,

		altr_sysmgr_regmap_lookup_by_phandle(pdev->dev.of_node,

						     "altr,sysmgr-syscon");

	} else {

		struct device_node *sysmgr_np;

		struct resource res;

		uintptr_t base;



		sysmgr_np = of_parse_phandle(pdev->dev.of_node,

					     "altr,sysmgr-syscon", 0);

		if (!sysmgr_np) {

			edac_printk(KERN_ERR, EDAC_DEVICE,

				    "Unable to find altr,sysmgr-syscon\n");

			return -ENODEV;

		}



		if (of_address_to_resource(sysmgr_np, 0, &res))

			return -ENOMEM;



		/* Need physical address for SMCC call */

		base = res.start;



		edac->ecc_mgr_map = devm_regmap_init(&pdev->dev, NULL,

						     (void *)base,

						     &s10_sdram_regmap_cfg);

	}



	if (IS_ERR(edac->ecc_mgr_map)) {

		edac_printk(KERN_ERR, EDAC_DEVICE,

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