Commit 5752fe0b authored by Athira Rajeev's avatar Athira Rajeev Committed by Michael Ellerman
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KVM: PPC: Book3S HV: Save/restore new PMU registers 



Power ISA v3.1 has added new performance monitoring unit (PMU) special
purpose registers (SPRs). They are:

Monitor Mode Control Register 3 (MMCR3)
Sampled Instruction Event Register A (SIER2)
Sampled Instruction Event Register B (SIER3)

Add support to save/restore these new SPRs while entering/exiting
guest. Also include changes to support KVM_REG_PPC_MMCR3/SIER2/SIER3.
Add new SPRs to KVM API documentation.

Signed-off-by: default avatarAthira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1594996707-3727-6-git-send-email-atrajeev@linux.vnet.ibm.com
parent c718547e

Documentation/virt/kvm/api.rst

+3 −0
Original line number Diff line number Diff line
@@ -2156,9 +2156,12 @@ registers, find a list below: 
  PPC     KVM_REG_PPC_MMCRA               64

  PPC     KVM_REG_PPC_MMCR2               64

  PPC     KVM_REG_PPC_MMCRS               64

  PPC     KVM_REG_PPC_MMCR3               64

  PPC     KVM_REG_PPC_SIAR                64

  PPC     KVM_REG_PPC_SDAR                64

  PPC     KVM_REG_PPC_SIER                64

  PPC     KVM_REG_PPC_SIER2               64

  PPC     KVM_REG_PPC_SIER3               64

  PPC     KVM_REG_PPC_PMC1                32

  PPC     KVM_REG_PPC_PMC2                32

  PPC     KVM_REG_PPC_PMC3                32

arch/powerpc/include/asm/kvm_book3s_asm.h

+1 −1
Original line number Diff line number Diff line
@@ -119,7 +119,7 @@ struct kvmppc_host_state { 
	void __iomem *xive_tima_virt;

	u32 saved_xirr;

	u64 dabr;

	u64 host_mmcr[7];	/* MMCR 0,1,A, SIAR, SDAR, MMCR2, SIER */

	u64 host_mmcr[10];	/* MMCR 0,1,A, SIAR, SDAR, MMCR2, SIER, MMCR3, SIER2/3 */

	u32 host_pmc[8];

	u64 host_purr;

	u64 host_spurr;

arch/powerpc/include/asm/kvm_host.h

+2 −2
Original line number Diff line number Diff line
@@ -637,14 +637,14 @@ struct kvm_vcpu_arch { 
	u32 ccr1;

	u32 dbsr;



	u64 mmcr[3];	/* MMCR0, MMCR1, MMCR2 */

	u64 mmcr[4];	/* MMCR0, MMCR1, MMCR2, MMCR3 */

	u64 mmcra;

	u64 mmcrs;

	u32 pmc[8];

	u32 spmc[2];

	u64 siar;

	u64 sdar;

	u64 sier;

	u64 sier[3];

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM

	u64 tfhar;

	u64 texasr;

arch/powerpc/include/uapi/asm/kvm.h

+5 −0
Original line number Diff line number Diff line
@@ -640,6 +640,11 @@ struct kvm_ppc_cpu_char { 
#define KVM_REG_PPC_ONLINE	(KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbf)

#define KVM_REG_PPC_PTCR	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc0)



/* POWER10 registers */

#define KVM_REG_PPC_MMCR3	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc1)

#define KVM_REG_PPC_SIER2	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc2)

#define KVM_REG_PPC_SIER3	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc3)



/* Transactional Memory checkpointed state:

 * This is all GPRs, all VSX regs and a subset of SPRs

 */

arch/powerpc/kernel/asm-offsets.c

+3 −0
Original line number Diff line number Diff line
@@ -698,6 +698,9 @@ int main(void) 
	HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);

	HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);

	HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);

	HSTATE_FIELD(HSTATE_MMCR3, host_mmcr[7]);

	HSTATE_FIELD(HSTATE_SIER2, host_mmcr[8]);

	HSTATE_FIELD(HSTATE_SIER3, host_mmcr[9]);

	HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);

	HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);

	HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);

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