Commit 56f18960 authored by Biju Das's avatar Biju Das Committed by Simon Horman
Browse files

ARM: dts: r8a7744: Add CAN support



Add the definitions for can0 and can1 to the r8a7744 SoC dtsi.

Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 5133bfed
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+20 −2
Original line number Diff line number Diff line
@@ -884,13 +884,31 @@
		};

		can0: can@e6e80000 {
			compatible = "renesas,can-r8a7744",
				     "renesas,rcar-gen2-can";
			reg = <0 0xe6e80000 0 0x1000>;
			/* placeholder */
			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 916>,
				 <&cpg CPG_CORE R8A7744_CLK_RCAN>,
				 <&can_clk>;
			clock-names = "clkp1", "clkp2", "can_clk";
			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
			resets = <&cpg 916>;
			status = "disabled";
		};

		can1: can@e6e88000 {
			compatible = "renesas,can-r8a7744",
				     "renesas,rcar-gen2-can";
			reg = <0 0xe6e88000 0 0x1000>;
			/* placeholder */
			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 915>,
				 <&cpg CPG_CORE R8A7744_CLK_RCAN>,
				 <&can_clk>;
			clock-names = "clkp1", "clkp2", "can_clk";
			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
			resets = <&cpg 915>;
			status = "disabled";
		};

		rcar_sound: sound@ec500000 {