Commit 56b20922 authored by Kukjin Kim's avatar Kukjin Kim
Browse files

ARM: EXYNOS4: Use samsung_rev() to distinguish silicon revision 



This patch uses samsung_rev() to support variable silicon revision of
EXYNOS4210 so that can support for EXYNOS4210 REV0, REV1.0 and REV1.1.

Note: Need to change timer setting on REV0.

Acked-by: default avatarChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent e6d1cb9f

arch/arm/mach-exynos4/cpu.c

+23 −5
Original line number Diff line number Diff line
@@ -42,11 +42,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { 
		.pfn		= __phys_to_pfn(EXYNOS4_PA_SYSTIMER),

		.length		= SZ_4K,

		.type	 	= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_SYSRAM,

		.pfn		= __phys_to_pfn(EXYNOS4_PA_SYSRAM),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_CMU,

		.pfn		= __phys_to_pfn(EXYNOS4_PA_CMU),
@@ -120,6 +115,24 @@ static struct map_desc exynos4_iodesc[] __initdata = { 
	},

};



static struct map_desc exynos4_iodesc0[] __initdata = {

	{

		.virtual	= (unsigned long)S5P_VA_SYSRAM,

		.pfn		= __phys_to_pfn(EXYNOS4_PA_SYSRAM0),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	},

};



static struct map_desc exynos4_iodesc1[] __initdata = {

	{

		.virtual	= (unsigned long)S5P_VA_SYSRAM,

		.pfn		= __phys_to_pfn(EXYNOS4_PA_SYSRAM1),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	},

};



static void exynos4_idle(void)

{

	if (!need_resched())
@@ -137,6 +150,11 @@ void __init exynos4_map_io(void) 
{

	iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));



	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)

		iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));

	else

		iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));



	/* initialize device information early */

	exynos4_default_sdhci0();

	exynos4_default_sdhci1();

arch/arm/mach-exynos4/include/mach/map.h

+2 −1
Original line number Diff line number Diff line
@@ -23,7 +23,8 @@ 


#include <plat/map-s5p.h>



#define EXYNOS4_PA_SYSRAM		0x02020000

#define EXYNOS4_PA_SYSRAM0		0x02025000

#define EXYNOS4_PA_SYSRAM1		0x02020000



#define EXYNOS4_PA_FIMC0		0x11800000

#define EXYNOS4_PA_FIMC1		0x11810000

arch/arm/mach-exynos4/platsmp.c

+6 −2
Original line number Diff line number Diff line
@@ -30,9 +30,12 @@ 
#include <mach/regs-clock.h>

#include <mach/regs-pmu.h>



#include <plat/cpu.h>



extern void exynos4_secondary_startup(void);



#define CPU1_BOOT_REG S5P_VA_SYSRAM

#define CPU1_BOOT_REG		(samsung_rev() == EXYNOS4210_REV_1_1 ? \

				S5P_INFORM5 : S5P_VA_SYSRAM)



/*

 * control for which core is the next to come out of the secondary
@@ -216,5 +219,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) 
	 * until it receives a soft interrupt, and then the

	 * secondary CPU branches to this address.

	 */

	__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM);

	__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),

			CPU1_BOOT_REG);

}

arch/arm/plat-samsung/include/plat/cpu.h

+6 −0
Original line number Diff line number Diff line
@@ -100,6 +100,10 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK) 
# define soc_is_exynos4210()	0

#endif



#define EXYNOS4210_REV_0	(0x0)

#define EXYNOS4210_REV_1_0	(0x10)

#define EXYNOS4210_REV_1_1	(0x11)



#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }



#ifndef MHZ
@@ -144,6 +148,8 @@ extern void s3c24xx_init_cpu(void); 
extern void s3c64xx_init_cpu(void);

extern void s5p_init_cpu(void __iomem *cpuid_addr);



extern unsigned int samsung_rev(void);



extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);



extern void s3c24xx_init_clocks(int xtal);

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